There's an updated RISC-V compiler (plus assembler, linker, libmach and

other library additions, etc) in contrib/miller/riscv.tar on 9p.io 

The original release was just for the simple rv32i instruction set. It's now

expanded to full rv32gc and rv64gc support, including floating point (single

and double) and compressed instructions. Instruction compression is done

automatically by default in the linker; use the option '-c' if you want to

disable it. (Compressed instructions generally run faster in hardware but

slower in emulation.)