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charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 9 Nov 2020, at 17:34, Richard Miller wrote: > There's an updated RISC-V compiler (plus assembler, linker, libmach and > other library additions, etc) in contrib/miller/riscv.tar on 9p.io=20 >=20 > The original release was just for the simple rv32i instruction set. It's = now > expanded to full rv32gc and rv64gc support, including floating point (sin= gle > and double) and compressed instructions. Instruction compression is done > automatically by default in the linker; use the option '-c' if you want to > disable it. (Compressed instructions generally run faster in hardware but > slower in emulation.) This is fantastic! Thank you! I look forward to trying them out. Pouya ------------------------------------------ 9fans: 9fans Permalink: https://9fans.topicbox.com/groups/9fans/T4943bad991203d32-Mcb0a8= 47b4ee967ebe546d4b1 Delivery options: https://9fans.topicbox.com/groups/9fans/subscription --f12b072862844798aa6d5b07ff369dea Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


<= /div>
On Mon, 9 Nov 2020, at 17:34, Richard Miller wrote:
There's an updated RI= SC-V compiler (plus assembler, linker, libmach and
other li= brary additions, etc) in contrib/miller/riscv.tar on 9p.io 

The original release was just for the simple rv32i i= nstruction set. It's now
expanded to full rv32gc and rv= 64gc support, including floating point (single
and double) = and compressed instructions. Instruction compression is done
automatically by default in the linker; use the option '-c' if yo= u want to
disable it. (Compressed instructions generally ru= n faster in hardware but
slower in emulation.)
<= /blockquote>

This is fantastic!  Thank you!  = ;I look forward to trying them out.

Pouya<= /div>

= --f12b072862844798aa6d5b07ff369dea--