From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <0da22f726ce8d3d875d3d6710f523acd@terzarima.net> To: 9fans@cse.psu.edu Subject: Re: [9fans] question on implementation of uhci host controller driver From: Charles Forsyth Date: Sat, 18 Mar 2006 08:16:38 +0000 In-Reply-To: <441BC014.5060003@austin.rr.com> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Topicbox-Message-UUID: 17346034-ead1-11e9-9d60-3106f5b1d025 > being set. Of course this doesn't explain why it works on physical > hardware. probably because the bit reflects the state of the frame processor, so that the bit is set iff it is halted, regardless how it came to be that way (which is what i'd expected, and indeed i believe that bit is set after reset). it's a reasonable way to do the hardware, but software probably just memsets an emulated register to 0 and doesn't set the bit initially.