[9fans] Risc-v toolchain?

[9fans] Risc-v toolchain?

[flux]

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Who did this work?  Can I bug you quickly?  I'd like a smidge of documentation on the calling convention.

In particular, I'm wanting to call the sbi, writing the equivalent of this gdb asm, but the calling convention is likely getting in my way of making it work:

> asm_print:
> addi sp, sp, -32
> sd ra, 24(sp) # return address
> sd s0, 16(sp) # frame pointer
> addi s0, sp, 32  # set up our new frame pointer, 32 bytes past our stack
> li a7, 0x4442434E
> li a6, 0x00
> li a2, 0
> # a0 and a1 already have our params
> ecall
> 
> ld ra, 24(sp) # restore return address
> ld s0, 16(sp) # restore return frame pointer
> addi sp, sp, 32 # drop the stack
> ret

Ideally I'd like to call this from C for early bringup debug.

 Thanks,
  Paul
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Re: [9fans] Risc-v toolchain?

[Paul Lalonde]

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Thanks Richard - what I'm missing is which registers I'm responsible for
saving.  The standard RiscV ABI uses a mix of caller vs callee saved and
parameters passed in registers.  Our convention differs, but I don't know
how with respect to riscv.

Thanks,
  Paul

On Mon, Jun 23, 2025 at 3:50 AM Richard Miller <9fans@hamnavoe.com> wrote:

> >  I'd like a smidge of documentation on the calling convention.
> 
> As with the other Plan 9 compilers, the '-S' option for ic/jc will
> show you the function call and entry sequences, in a syntax which
> is meant to be acceptable by ia/ja. The '-a' option for il/jl will
> show you the actual machine instructions generated.
> 
> Geoff Collyer's 9k riscv64 port has a wrapper for calling the SBI
> from C, in /sys/src/9k/rv/sbiecall.s
> 

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Re: [9fans] Risc-v toolchain?

[ron minnich]

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plan 9 is caller-save. When I wrote my version of this in 2015, I did not
save anything. First arg is in RARG, the rest are on the stack.

So the sum total of my "call opensbi" code was to move arguments to
registers and take the trap. I'll assume those rules still apply.



On Mon, Jun 23, 2025 at 8:18 AM Paul Lalonde <paul.a.lalonde@gmail.com>
wrote:

> Thanks Richard - what I'm missing is which registers I'm responsible for
> saving.  The standard RiscV ABI uses a mix of caller vs callee saved and
> parameters passed in registers.  Our convention differs, but I don't know
> how with respect to riscv.
>
> Thanks,
>   Paul
>
> On Mon, Jun 23, 2025 at 3:50 AM Richard Miller <9fans@hamnavoe.com> wrote:
>
>> >  I'd like a smidge of documentation on the calling convention.
>> 
>> As with the other Plan 9 compilers, the '-S' option for ic/jc will
>> show you the function call and entry sequences, in a syntax which
>> is meant to be acceptable by ia/ja. The '-a' option for il/jl will
>> show you the actual machine instructions generated.
>> 
>> Geoff Collyer's 9k riscv64 port has a wrapper for calling the SBI
>> from C, in /sys/src/9k/rv/sbiecall.s
>> 
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Re: [9fans] Risc-v toolchain?

[Richard Miller]

> Thanks Richard - what I'm missing is which registers I'm responsible for
> saving.

Plan 9 C compilers are always caller-save, so you don't have to save
anything (unless you're using extern registers).

Register usage (REGARG, REGRET, etc) for the Plan 9 riscv compiler is
defined in /sys/src/cmd/ic/i.out.h

Geoff's code has a lot of useful comments about the SBI conventions,
for example that SP has to be 16-byte aligned.


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