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Date: Fri,  5 Dec 2008 12:11:44 -0800
From: "ron minnich" <rminnich@gmail.com>
To: "Fans of the OS Plan 9 from Bell Labs" <9fans@9fans.net>
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Subject: Re: [9fans] image/memimage speed
Topicbox-Message-UUID: 5b48562e-ead4-11e9-9d60-3106f5b1d025

On Fri, Dec 5, 2008 at 11:30 AM, Paul Lalonde <plalonde@telus.net> wrote:
> But random access patterns suck at being speculatively cached.
> Linear access patterns still require reasonably careful work for the caching
> to do the right thing.
> Expecting your entire frame buffer to be cached in L2 isn't particularly
> reasonable.
>

I'm pretty sure we can put some #s on this discussion. It's too fuzzy for me.

Forget speculative reads, for now. Paul, what kind of time are you
seeing on your measurements to load a cache line over pcie from a
card?

ron