From mboxrd@z Thu Jan 1 00:00:00 1970 MIME-Version: 1.0 In-Reply-To: <509071940903191614w4e9827b0h1981f33eb758035c@mail.gmail.com> References: <13426df10903191453mdcf7448if69843e91c60ce4@mail.gmail.com> <509071940903191614w4e9827b0h1981f33eb758035c@mail.gmail.com> Date: Thu, 19 Mar 2009 16:24:04 -0700 Message-ID: <13426df10903191624m51f94c91qc0660089f8e58a17@mail.gmail.com> From: ron minnich To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [9fans] I can not remember if I sent this or not: MIPS-64 (sort of) notebook Topicbox-Message-UUID: bf3ac9e6-ead4-11e9-9d60-3106f5b1d025 On Thu, Mar 19, 2009 at 4:14 PM, Anthony Sorace wrote: > i was looking at this a week or two ago, trying to find an ARM or MIPS > laptop to play with. my first question was whether the "missing" parts > of the MIPS instruction set are things that our compilers currently > generate; SoC (oh, and my day job) ramped up before i could find the > list of missing instructions. any idea? > > getting quotes or delivery in the US seemed tricky, too. so, here's a silghtly controversial (maybe) suggestion. Maybe my memory is wrong, but i believe the vx32 kernel is gcc-compiled. There is gcc for this CPU. It might be easier to start from the vx32 kernel and gcc to target this machine, rather than do a 64-bit MIPS port of the plan 9 C compiler. Or not: a few of the folks on this list could probably retarget in very short order (I'm not one of the,however). ron