Re: [9fans] 'no fat' - boot failure

[cinap_lenrek@gmx.de]

no. the i/o apics are programmed like before as specified in the iointr
entry from the mp table. i have no way differentiating if this is a
real isa bus or some compatibilty hack or just plain wrong mp table.

i looked in openbsd code and just figured they allow sharing edge
interrupts so i just removed the level check.

Each I/O APIC is assigned a base GSI by the BIOS. Each input pin on the
I/O APIC is mapped to a GSI number by adding the pin number (zero-based)
to the base GSI. Thus, if an I/O APIC has a base GSI of N, pin 0 on that
I/O APIC has a GSI of N, pin 1 has a GSI of N + 1, etc. The I/O APIC with
a base GSI of 0 maps the ISA IRQs onto its first 16 input pins. Thus, the
ISA IRQs are effectively always mapped 1:1 onto GSIs. More details about
GSIs can be found in Section 5.2.11 of the ACPI 2.0c spec [2].

looking at a random linux dmesg of a T61 from the web, i see that our
ioapic indeed has GSI base of 0. so ioapic pins 0-15 are the (fake)
isa irq's like they are specified in the mptable.

term% grep -in GSI /tmp/dmesg
108: [    0.000000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
109: [    0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-23
118: [    0.000000] nr_irqs_gsi: 40
611: [    0.575784] pci 0000:00:01.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
613: [    0.575796] pci 0000:00:1c.0: PCI INT A -> GSI 20 (level, low) -> IRQ 20
615: [    0.575810] pci 0000:00:1c.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
617: [    0.575824] pci 0000:00:1c.2: PCI INT C -> GSI 22 (level, low) -> IRQ 22
619: [    0.575838] pci 0000:00:1c.3: PCI INT D -> GSI 23 (level, low) -> IRQ 23
621: [    0.575850] pci 0000:00:1c.4: PCI INT A -> GSI 20 (level, low) -> IRQ 20
625: [    0.575875] pci 0000:15:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
730: [    1.010177] serial 0000:00:03.3: PCI INT B -> GSI 17 (level, low) -> IRQ 17
738: [    1.032435] ata_piix 0000:00:1f.1: PCI INT C -> GSI 16 (level, low) -> IRQ 16
745: [    1.033155] pata_acpi 0000:00:03.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
749: [    1.033236] ata_generic 0000:00:03.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
762: [    1.034141] ehci_hcd 0000:00:1a.7: PCI INT C -> GSI 22 (level, low) -> IRQ 22
773: [    1.090199] ehci_hcd 0000:00:1d.7: PCI INT D -> GSI 19 (level, low) -> IRQ 19
785: [    1.160231] uhci_hcd 0000:00:1a.0: PCI INT A -> GSI 20 (level, low) -> IRQ 20
794: [    1.160507] uhci_hcd 0000:00:1a.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
803: [    1.160783] uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
810: [    1.161055] uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
819: [    1.161324] uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
866: [    1.507624] sdhci-pci 0000:15:00.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
873: [    1.515999] e1000e 0000:00:19.0: PCI INT A -> GSI 20 (level, low) -> IRQ 20
877: [    1.544416] firewire_ohci 0000:15:00.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
884: [    2.052404] ahci 0000:00:1f.2: PCI INT B -> GSI 16 (level, low) -> IRQ 16
938: [   11.919940] nouveau 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
973: [   12.007486] HDA Intel 0000:00:1b.0: PCI INT B -> GSI 17 (level, low) -> IRQ 17
984: [   12.011732] r852 0000:15:00.5: PCI INT C -> GSI 18 (level, low) -> IRQ 18
1024: [   12.354855] iwl3945 0000:03:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17

so this would give the following mapping for pci devices to the
ioapic intrin pins:

bus	dev	INTP	dev*4+(INTP-1)	intrin
0	1	1	4		16
0	3	2	13		17
0	3	3	14		18
0	25	1	100		20
0	26	1	104		20
0	26	2	105		21
0	26	3	106		22
0	28	1	112		20
0	28	2	113		21
0	28	3	114		22
0	28	4	115		23
0	29	1	116		16
0	29	2	117		17
0	29	3	118		18
0	29	4	119		19
0	31	2	125		16
0	31	3	126		16
1	0	1	0		16
3	0	1	0		17
21	0	1	0		16
21	0	2	1		17
21	0	3	2		18

could generate a new mp table from this mapping. 9front kernel
lets you override the mp table. will try this...

--
cinap