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From: cinap_lenrek@felloff.net
To: 9fans@9fans.net
Subject: Re: [9fans] VMX Cores
Date: Sun, 17 Mar 2024 21:45:48 +0100	[thread overview]
Message-ID: <13FCA7C1E47C7879DAEF559AB19DEE5F@felloff.net> (raw)
In-Reply-To: <17107012140.3DDfA3.94831@composer.9fans.topicbox.com>

for the kernel part, a devvmx vm *IS* a core
basically and the physical memory that core
sees is passed as a segment to the device.

so having multiple cpu support should be fine
without having even to change the kernel part,
you just have multiple vmx instances share a
memory segment.

however, to be practical, you'd need to add
emulation code for the apic interrupt controller
as well provide acpi or mp tables...

reason is a core is started with a inter processor
interrupt thru the apic. the kernel discoveres
the apics thru eigther MP tables or ACPI tables.

and the processor comes up in real-mode, which might
have some limitations in what hardware will emulate
for us so a interpreter might be needed.
(tho i'm not fully sure on this)

(note, right now vmx has no BIOS and it implements
each OS bootloader itself so it starts executing
the kernel in 32 bit mode directly).

i dont see vmx causing kernel crashes for me.
however, i think the author meant to express is lack
of confidence in the air-tightiness of vmx giving
the zillions of architectual registers you have to
setup to contain a guest. it is easy to forget
to set some bit and everything works until someone
manages to exploit that.

patches welcome.

--
cinap

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  reply	other threads:[~2024-03-17 20:46 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-17 18:46 jubal.biggs
2024-03-17 20:45 ` cinap_lenrek [this message]
2024-03-18 11:40   ` hiro

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