From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <1860770efaae1076bc9ee9fbcf68fdd2@hamnavoe.com> To: 9fans@9fans.net From: Richard Miller <9fans@hamnavoe.com> Date: Fri, 19 Oct 2012 16:39:56 +0100 In-Reply-To: <5ac1687f3033e5bc4c6a8f0896f5a974@ladd.quanstro.net> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Subject: Re: [9fans] sheevaplug SD card driver Topicbox-Message-UUID: c0efcff4-ead7-11e9-9d60-3106f5b1d025 > easiest to just > cacheline-align everything in malloc Might be a good idea for ARM. Until someone produces a chip with gigantic cache lines? Another alternative might be to have a separate pool of uncached memory.