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* Panic trap booting plan 9
@ 1995-09-16  0:03 jmk
  0 siblings, 0 replies; 2+ messages in thread
From: jmk @ 1995-09-16  0:03 UTC (permalink / raw)


	> panic:crda write 16382 to 16384

This is from the DP8390 part of the NE2000 driver and indicates an assertion
botch in setting up the on-chip DMA. Unfortunately I won't be able to get at the
datasheet until Monday, my recollections of the DP8390 DMA are hazy.






^ permalink raw reply	[flat|nested] 2+ messages in thread

* Panic trap booting plan 9
@ 1995-09-16  2:14 forsyth
  0 siblings, 0 replies; 2+ messages in thread
From: forsyth @ 1995-09-16  2:14 UTC (permalink / raw)


>	> panic:crda write 16382 to 16384

i had a related problem with one (out of 50) ``ne2000 compatible''
cards.  it was very compatible ...  here are some changes that might help,
but they are not definitive.

diff old /sys/src/boot/pc/ether8390.c
342d341
< 
351c350
< 	ulong dp8390, crda;
---
> 	ulong dp8390;
369,370d367
< 	 * This is straight from the DP8390[12D] datasheet, hence
< 	 * the initial set up for read.
372,377c369,373
< 	crda = to-1-ctlr->card.bit16;
< 	dp8390outb(dp8390+Rbcr0, (len+1+ctlr->card.bit16) & 0xFF);
< 	dp8390outb(dp8390+Rbcr1, ((len+1+ctlr->card.bit16)>>8) & 0xFF);
< 	dp8390outb(dp8390+Rsar0, crda & 0xFF);
< 	dp8390outb(dp8390+Rsar1, (crda>>8) & 0xFF);
< 	dp8390outb(dp8390+Cr, Page0|RDMAread|Sta);
---
> 	dp8390outb(dp8390+Rsar0, to & 0xFF);
> 	dp8390outb(dp8390+Rsar1, (to>>8) & 0xFF);
> 	dp8390outb(dp8390+Rbcr0, len & 0xFF);
> 	dp8390outb(dp8390+Rbcr1, (len>>8) & 0xFF);
> 	dp8390outb(dp8390+Cr, Page0|RDMAwrite|Sta);
379,397d374
< 	for(;;){
< 		crda = dp8390inb(dp8390+Crda0);
< 		crda |= dp8390inb(dp8390+Crda1)<<8;
< 		if(crda == to){
< 			/*
< 			 * Start the remote DMA write and make sure
< 			 * the registers are correct.
< 			 */
< 			dp8390outb(dp8390+Cr, Page0|RDMAwrite|Sta);
< 
< 			crda = dp8390inb(dp8390+Crda0);
< 			crda |= dp8390inb(dp8390+Crda1)<<8;
< 			if(crda != to)
< 				panic("crda write %d to %d\n", crda, to);
< 
< 			break;
< 		}
< 	}
< 
413d389
< 
442d417
< 
581,582c556
< 	while(isr = dp8390inb(dp8390+Isr)){
< 
---
> 	while(isr = (dp8390inb(dp8390+Isr) & (Cnte|Ovwe|Txee|Rxee|Ptxe|Prxe))){

		----------------------
diff old /sys/src/9/pc/ether8390.c
353c353
< 	ulong dp8390, crda;
---
> 	ulong dp8390;
371,372d370
< 	 * This is straight from the DP8390[12D] datasheet, hence
< 	 * the initial set up for read.
374,398c372,376
< 	crda = to-1-ctlr->card.bit16;
< 	dp8390outb(dp8390+Rbcr0, (len+1+ctlr->card.bit16) & 0xFF);
< 	dp8390outb(dp8390+Rbcr1, ((len+1+ctlr->card.bit16)>>8) & 0xFF);
< 	dp8390outb(dp8390+Rsar0, crda & 0xFF);
< 	dp8390outb(dp8390+Rsar1, (crda>>8) & 0xFF);
< 	dp8390outb(dp8390+Cr, Page0|RDMAread|Sta);
< 
< 	for(;;){
< 		crda = dp8390inb(dp8390+Crda0);
< 		crda |= dp8390inb(dp8390+Crda1)<<8;
< 		if(crda == to){
< 			/*
< 			 * Start the remote DMA write and make sure
< 			 * the registers are correct.
< 			 */
< 			dp8390outb(dp8390+Cr, Page0|RDMAwrite|Sta);
< 
< 			crda = dp8390inb(dp8390+Crda0);
< 			crda |= dp8390inb(dp8390+Crda1)<<8;
< 			if(crda != to)
< 				panic("crda write %d to %d\n", crda, to);
< 
< 			break;
< 		}
< 	}
---
> 	dp8390outb(dp8390+Rsar0, to & 0xFF);
> 	dp8390outb(dp8390+Rsar1, (to>>8) & 0xFF);
> 	dp8390outb(dp8390+Rbcr0, len & 0xFF);
> 	dp8390outb(dp8390+Rbcr1, (len>>8) & 0xFF);
> 	dp8390outb(dp8390+Cr, Page0|RDMAwrite|Sta);






^ permalink raw reply	[flat|nested] 2+ messages in thread

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