From mboxrd@z Thu Jan  1 00:00:00 1970
Date: Wed,  1 Oct 1997 05:09:50 +1000
From: David Hogan dhog@lore.plan9.cs.su.oz.au
Subject: [9fans] Plan9 commercial licenses
Topicbox-Message-UUID: 676cdf30-eac8-11e9-9e20-41e7f4b1d025
Message-ID: <19970930190950.HJJWXFuLXUe10jrHYx6gCzisOVzy1xlfXbmuN8mRf4I@z>

> I got wedged trying to scribble into the Matrox MGA from a user process
> because I couldn't figure out how to wire a user page to a physical
> address that was higher than KZERO (0x8000000).. the PCI bios tends to
> wire my MGA framebuffer to 0xe800000 and segattach won't allow physaddrs 
> that high.  I *could* change the MGAs framebuffer addr but I'd prefer
> to let PCI bios set it up where it thinks is ok (as if pci bioses always
> worked right, heh).

Probably better to set the PCI base addrs yourself -- it's either that,
or else hack around with mmu.c.  I think that the current implementation
only maps 128M of physical space to KZERO; this costs 128K for the pte
mappings.  I think I might have read somewhere that you can map
``big pages'' with a single pte on the intel arch (at least with
recent versions thereof).  Either way, it seems advantageous to
keep the physical address allocation as contiguous as possible
(which means not going with the PCI BIOS allocations).

I have some code which allocates addresses for PCI and PnP
cards, but it's a bit of a mess.  I made this "/dev/cards"
interface which allows accessing the device registers from
user mode; not efficiently, though, you need segattach for
that.  FWIW, I have heard that Brazil has some ``improved
PCI support''.

Do you have aux/vga working with the Matrox Millenium?  I'd
be interested in that, I have one of these cards at work.