From: jmk@plan9.bell-labs.com
To: 9fans@cse.psu.edu
Subject: Re: [9fans] third edition, installation experiences
Date: Sat, 10 Jun 2000 15:25:37 -0400 [thread overview]
Message-ID: <200006101925.PAA28165@cse.psu.edu> (raw)
>The other day I said something about not being able to
>assign an irq. The actual error message was:
>
> i8259enable: irq 7 shared but not level
> intrenable: couldn't enable irq 7, tbdf 0xffffffff for lpt
>
>According to '#P/irqalloc', irq 7 is assigned to mathemu.
There's a misunderstanding in the numerology, IRQ 7 has a base vector
added to it of (in this case) 32, so you should look in '#P/irqalloc'
for something using vector 39 (the output actually shows you which
IRQ maps to which vector, important in SMP machines).
The reason for the message is that some other driver has registered as
wanting to use that IRQ already and, as this is an 8259 PIC, you can't
share interrupts unless the corresponding bit is set in the Edge/Level
Control Register (ELCR) and apparently it isn't.
--jim
next reply other threads:[~2000-06-10 19:25 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-06-10 19:25 jmk [this message]
2000-06-11 19:12 ` Scott Schwartz
2000-06-12 10:27 ` Douglas A. Gwyn
-- strict thread matches above, loose matches on Subject: below --
2000-06-10 18:56 presotto
2000-06-10 18:22 rob pike
[not found] <rsc@plan9.bell-labs.com>
2000-06-10 18:18 ` Russ Cox
2000-06-11 19:09 ` Scott Schwartz
2000-06-10 17:54 Scott Schwartz
2000-06-09 15:58 jmk
[not found] <200006081831.OAA25336@smtp1.fas.harvard.edu>
[not found] ` <20000608191813.8754.qmail@g.bio.cse.psu.edu>
2000-06-09 8:27 ` Fco. J. Ballesteros
2000-06-12 15:49 ` Lyndon Nerenberg
2000-06-15 9:09 ` Fco. J. Ballesteros
2000-06-15 16:58 ` Lyndon Nerenberg
2000-06-12 9:59 ` kajri jain
2000-06-08 19:18 Scott
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