From mboxrd@z Thu Jan 1 00:00:00 1970 From: jmk@plan9.bell-labs.com Message-Id: <200006101925.PAA28165@cse.psu.edu> Date: Sat, 10 Jun 2000 15:25:37 -0400 To: 9fans@cse.psu.edu Subject: Re: [9fans] third edition, installation experiences MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Topicbox-Message-UUID: b50a575e-eac8-11e9-9e20-41e7f4b1d025 >The other day I said something about not being able to >assign an irq. The actual error message was: > > i8259enable: irq 7 shared but not level > intrenable: couldn't enable irq 7, tbdf 0xffffffff for lpt > >According to '#P/irqalloc', irq 7 is assigned to mathemu. There's a misunderstanding in the numerology, IRQ 7 has a base vector added to it of (in this case) 32, so you should look in '#P/irqalloc' for something using vector 39 (the output actually shows you which IRQ maps to which vector, important in SMP machines). The reason for the message is that some other driver has registered as wanting to use that IRQ already and, as this is an 8259 PIC, you can't share interrupts unless the corresponding bit is set in the Edge/Level Control Register (ELCR) and apparently it isn't. --jim