>In fact, commands are sent safely to FDC, and I get right results other
>than floppyxfer() which uses DMA transfer.

When I'm reading japanese documentation on υPD765 FDC chip, I found
this chip requires response from the CPU within a relatively short time
period, such that 14υS.  If there is no such response from the CPU,
it goes to overrun error.  Does the Plan 9 DMA mechanism can satisfy
this demand?

Kenji