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From: andrey mirtchovski <andrey@lanl.gov>
To: <9fans@cse.psu.edu>
Subject: [9fans] GeForce3 hardware acceleration patch
Date: Tue, 30 Apr 2002 11:26:10 -0600	[thread overview]
Message-ID: <20020430105948.X563-100000@fbsd.acl.lanl.gov> (raw)

hi,

the nvidia drivers for release 4 now come with hardware acceleration
(defaultly turned on), however the GeForce3 cards (DID 0x200 and up) do
not like it much. the problem is that the fill routine is not working
(either properly or at all) and the screen is unusable. maybe only to type
'echo hwaccel off > /dev/vgactl'.

the patch given here fixes this problem and allows for hardware
accelerated graphics, which, i must admit, are quite fast!

i've looked at the nvidia riva_hw.c xfree86 driver (where much of the
original nvidia support for plan9 comes from). an updated riva_tbl.h is
included too, for your convenience.

i have tested the new driver on the following hardware:
RivaTNT -- 8 and 32 bpp, hwacell on/off
Geforce2MX -- 8 and 32 bpp, hwaccel on/off
another GeForce2 (Asus, unidentified) -- 8 and 32bpp, hwaccel on
GeForce3(DID 0x200) -- 8 and 32 bpp, hwaccel on/off

you will notice two more device IDs added to the list -- 0x201 and 0x202.
i found those in xfree86 and they seemed to have nothing different from
0x200 driver-wise, so i decided to include them. no vgabios strings are
known for those.

note: i've tried to make sure that the old driver is kept intact. in fact
i've tried to separate anything geforce3 related into its own
architecture-specific if()'s. there's still a small posibility i've broken
something. please do tell if i have :)

anyway, here's the patch, email me if you need the whole files:


-------- vganvidia.c
p9% diff /sys/src/9/pc/vganvidia.c /sys/src/9/pc/vganvidia.c.old
46,47d45
< 	0x0201,
< 	0x0202,

-------- nvidia.c
p9% diff /sys/src/cmd/aux/vga/nvidia.c /sys/src/cmd/aux/vga/nvidia.c.old
34c34
< 	ulong	pitch[6];
---
> 	ulong	pitch[5];
73a74
> 		case 0x0200:		/* GeForce3 */
76,80d76
< 		case 0x0200:		/* GeForce3 */
< 		case 0x0201:		/* some other geforce3's */
< 		case 0x0202:
< 			nv->arch = 20;
< 			break;
136c132
< 	if (nv->arch == 10 || nv->arch == 20) {
---
> 	if (nv->arch == 10) {
140d135
<
146c141
< 	for(i=0; i<6; i++)
---
> 	for(i=0; i<5; i++)
242c237
< 	if(nv->arch == 4)
---
> 	if(nv->arch != 10)
244,245d238
< 	else if(nv->arch == 10 || nv->arch == 20)
< 		nv->config = nv->pfb[0x200/4];
378c371
< 	int i, j = 0;
---
> 	int i, j;
411d403
< 	case 20:
431,446d422
<
< 	if(nv->arch == 4 || nv->arch == 10) {
< 		for(i=0; i<4; i++)
< 			nv->pgraph[0x640/4+i] = nv->offset[i];
< 		if(nv->arch == 10)
< 			j = 5;
< 		else if(nv->arch == 4)
< 			j = 4;
< 		for(i=0; i<j; i++)
< 			nv->pgraph[0x670/4+i] = nv->pitch[i];
< 	}
< 	if(nv->arch == 20) {
< 		for(i = 0; i < 4; i++)
< 			nv->pgraph[0x820/4+i] = nv->offset[i];
< 		for(i = 0; i < 6; i++)
< 			nv->pgraph[0x850/4+i] = nv->pitch[i];
448,453c424,431
< 		nv->pgraph[0x9A4/4] = nv->pfb[0x200/4];
< 		nv->pgraph[0x9A8/4] = nv->pfb[0x204/4];
< 		nv->pramdac[0x052C/4] = 0x101;
< 		nv->pramdac[0x252C/4] = 0x1;
< 	}
<
---
> 	for(i=0; i<4; i++)
> 		nv->pgraph[0x640/4+i] = nv->offset[i];
> 	if(nv->arch == 10)
> 		j = 5;
> 	else
> 		j = 4;
> 	for(i=0; i<j; i++)
> 		nv->pgraph[0x670/4+i] = nv->pitch[i];
455d432
<
463c440
< 	if(nv->arch == 10 || nv->arch == 20){
---
> 	if(nv->arch == 10){
479d455
< 	case 20:


-------- riva_tbl.h
p9% diff /sys/src/cmd/aux/vga/riva_tbl.h
/sys/src/cmd/aux/vga/riva_tbl.h.old
39d38
< /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h,v 1.8
2001/09/19 23:40:06 mvojkovi Exp $ */
40a40,45
> /*
>  * GPL licensing note -- nVidia is allowing a liberal interpretation of
>  * the documentation restriction above, to merely say that this nVidia's
>  * copyright and disclaimer should be included with all code derived
>  * from this source.  -- Jeff Garzik <jgarzik@mandrakesoft.com>,
01/Nov/99
>  */
41a47
> /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h,v 1.5
2000/02/08 17:19:12 dawes Exp $ */
66d71
<     {0x00003000, 0x80000016},
172,173d176
<     {0x00000258, 0x80000016},
<     {0x00000259, 0x00CA034C},
210,213c213
<     {0x00000D2F, 0x00000000},
<     {0x00000D31, 0x00000000},
<     {0x00000D32, 0x00000000},
<     {0x00000D33, 0x00000000}
---
>     {0x00000D2F, 0x00000000}
225,226c225
<     {0x00000D1C, 0x10419208},
<     {0x00000D30, 0x10118203}
---
>     {0x00000D1C, 0x10419208}
238,239c237
<     {0x00000D1C, 0x10419208},
<     {0x00000D30, 0x10118200}
---
>     {0x00000D1C, 0x10419208}
251,252c249
<     {0x00000D1C, 0x10419208},
<     {0x00000D30, 0x10118201}
---
>     {0x00000D1C, 0x10419208}
376,377d372
<     {0x0000000C, 0x80000016},
<     {0x0000000D, 0x8001114F},
437,440c432
<     {0x0000053B, 0x00000000},
<     {0x0000053C, 0x0300A01C},
<     {0x0000053E, 0x11401140},
<     {0x0000053F, 0x00000000}
---
>     {0x0000053B, 0x00000000}
455,456c447
<     {0x00000539, 0x00000000},
<     {0x0000053D, 0x00000302}
---
>     {0x00000539, 0x00000000}
471,472c462
<     {0x00000539, 0x00000702},
<     {0x0000053D, 0x00000902}
---
>     {0x00000539, 0x00000702}
487,488c477
<     {0x00000539, 0x00000702},
<     {0x0000053D, 0x00000C02}
---
>     {0x00000539, 0x00000702}
503,504c492
<     {0x00000539, 0x00000E02},
<     {0x0000053D, 0x00000E02}
---
>     {0x00000539, 0x00000E02}
817,818d804
<     {0x0000000C, 0x80000016},
<     {0x0000000D, 0x80011150},
839c825
<     {0x00000508, 0x01008043},
---
>     {0x00000508, 0x01008043},
883,886c869
<     {0x0000053F, 0x00000000},
<     {0x00000540, 0x0300A01C},
<     {0x00000542, 0x11401140},
<     {0x00000543, 0x00000000}
---
>     {0x0000053F, 0x00000000}
902,903c885
<     {0x0000053D, 0x00000000},
<     {0x00000541, 0x00000302}
---
>     {0x0000053D, 0x00000000}
919,920c901
<     {0x0000053D, 0x00000902},
<     {0x00000541, 0x00000902}
---
>     {0x0000053D, 0x00000902}
936,937c917
<     {0x0000053D, 0x00000C02},
<     {0x00000541, 0x00000C02}
---
>     {0x0000053D, 0x00000C02}
953,954c933
<     {0x0000053D, 0x00000E02},
<     {0x00000541, 0x00000E02}
---
>     {0x0000053D, 0x00000E02}



                 reply	other threads:[~2002-04-30 17:26 UTC|newest]

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