From mboxrd@z Thu Jan  1 00:00:00 1970
Date: Wed, 28 Mar 2007 00:19:35 -0400
From: William Josephson <jkw@eecs.harvard.edu>
To: Fans of the OS Plan 9 from Bell Labs <9fans@cse.psu.edu>
Subject: Re: [9fans] non-PC hardware
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On Tue, Mar 27, 2007 at 08:06:22PM -0400, erik quanstrom wrote:
> i'm not sure what advantage more registers present in modern (amd|intel)/x64
> chips.  a value in l1 cache is only 1 cycle away.  so i'm not sure what the
> practical difference is between something in a register and something in l1.

It is more than 1 cycle away; more like 2-3 and for many
applications the extra registers do make a big difference.