From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Mon, 1 Dec 2008 08:24:58 -0700 From: plalonde@telus.net To: 9fans@9fans.net Cc: 9fans@9fans.net Message-ID: <27049442.3521101228145098701.JavaMail.nitido@priv-edtnes95> MIME-Version: 1.0 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [9fans] image/memimage speed Topicbox-Message-UUID: 54f7cbce-ead4-11e9-9d60-3106f5b1d025
Intel integrated and derivatives have an actual "frame buffer", in tha= t you set a base pointer to a contiguous block of memory visible to the ada= pter and scan-out happens from there.

I think the real performan= ce issue for hardware where the frame buffer is in the PCIe shared memory a= pperture is that writes are write-through/coalesced on their way across the= PCIe, but reads can't be, and so incur huge stalls.

Paul


Dec 1, 2008 06:34:59 AM, 9fans@9fans.net wrote:

=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D


>
> Very true= , the only exception to this I know of is some of the modern
> Dual PCI= Express cards which use a bus in each direction.
>

do you hav= e a reference for "dual pciexpress"? =C2=A0as far as i know,
pcie/agp/p= ci cards only have a single bus that goes both ways.

my limited un= derstanding was that the reason that reading the
framebuffer was slow, = was that there is no framebuffer. =C2=A0it's an
illusion that the card = provides that's easy to write but not so
easy to fake on reads.
someone with real understanding of graphics please correct me.

-= erik