On Mon, Oct 19, 2009 at 9:34 AM, Sam Watkins <
sam@nipl.net> wrote:
> The "processors" (actually smaller processing units) would mostly be configured
> at load time, much like an FPGA. Most units would execute a single simple
> operation repeatedly on streams of data, they would not read instructions and
> execute them sequentially like a normal CPU.
>
> The data would travel through the system step by step, it would mostly not need
> to be stored in RAM. If some RAM was needed, it would be small amounts on
> chip, at appropriate places in the pipeline.
>
> Some programs (not so much video encoding I think) do need a lot of RAM for
> intermediate calculations, or IO for example to fetch stuff from a database.
> Such systems can also be designed as networks of simple processing units
> connected by data streams / pipelines.
I think we could connect them with hyperbarrier technology. Basically