Re: [9fans] question on implementation of uhci host controller driver

[Lonnie Mendez <lmendez19@austin.rr.com>]

Charles Forsyth wrote:

>>being set.  Of course this doesn't explain why it works on physical
>>hardware.
>>
>>
>
>probably because the bit reflects the state of the frame processor,
>so that the bit is set iff it is halted, regardless how it came to be that way
>(which is what i'd expected, and indeed  i believe that bit is set after reset).
>it's a reasonable way to do the hardware, but software probably just
>memsets an emulated register to 0 and doesn't set the bit initially.
>
   Hm.  The initial (default) value for USBSTS register is 0.  Looking
at HCRESET it states that "the Host Controller module resets its
internal timers, counters, state machines, etc to their initial value."
GRESET does something similar.  If the initial value isn't the default
value then I'll be understanding this a whole lot better.  For
comparison, here is the initial take from windows xp's uhci driver:

uhci readw port=0x0000 val=0x0000
uhci writew port=0x0000 val=0x0004
uhci writew port=0x0000 val=0x0000
uhci writew port=0x0004 val=0x0000
uhci readw port=0x0000 val=0x0000
uhci writew port=0x0000 val=0x0000
uhci readw port=0x0002 val=0x0000
uhci readw port=0x0002 val=0x0000
uhci readw port=0x0002 val=0x0000
uhci readw port=0x0002 val=0x0000