From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <441C6550.50500@austin.rr.com> Date: Sat, 18 Mar 2006 13:53:52 -0600 From: Lonnie Mendez User-Agent: Mozilla Thunderbird 1.0.7 (X11/20050923) MIME-Version: 1.0 To: Fans of the OS Plan 9 from Bell Labs <9fans@cse.psu.edu> Subject: Re: [9fans] question on implementation of uhci host controller driver References: <8716cb52347cfc2f301da7a4b05c7971@terzarima.net> In-Reply-To: <8716cb52347cfc2f301da7a4b05c7971@terzarima.net> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Topicbox-Message-UUID: 18c3d97a-ead1-11e9-9d60-3106f5b1d025 Charles Forsyth wrote: >> If the initial value isn't the default >>value then I'll be understanding this a whole lot better. >> >> > >yes, having checked the spec again i see what you mean. >i'm not sure, then. if i have a spare moment when working on the ohci >i'll see what is in the uhci registers after a reset. > I added a debug statement to show the initial value set in the uhci probe function under linux. This is displayed before the hcd ever touches the registers: uhci_hcd 0000:00:1d.0: UHCI Host Controller uhci_hcd 0000:00:1d.0: detected 2 ports uhci_hcd 0000:00:1d.0: uhci_check_and_reset_hc: sts = 0x0020 uhci_hcd 0000:00:1d.0: uhci_check_and_reset_hc: cmd = 0x0000 Sure enough the status register has hchalted bit set. I'm not sure if the bios does this or the firmware on the uhci controller. I'll submit a patch for qemu to make it more realistic (and so plan9 boots with -usb parameter). Most of my patches for qemu are linked here: http://gnome.dnsalias.net/patches/