From mboxrd@z Thu Jan  1 00:00:00 1970
Message-ID: <581cb553c4f0794103d1444a810602cd@felloff.net>
Date: Sat, 10 Jan 2015 23:50:35 +0100
From: cinap_lenrek@felloff.net
To: 9fans@9fans.net
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Subject: [9fans] aux/vga hsync/hblank confustion
Topicbox-Message-UUID: 39cc3786-ead9-11e9-9d60-3106f5b1d025

it seems to me that aux/vga uses shb/ehb (start/end horizontal blank) to
really mean shs/ehs (start/end horizontal sync)?

there are some vgadb entries that specify shs *smaller* than shb and the
edid parser does the following:

	m->x = ha;
	m->ht = ha+hb;
	m->shs = ha;				<- *WHAT*
	m->shb = ha+hso;			<- *WHAT*
	m->ehb = ha+hso+hspw;		<- *WHAT*
	m->ehs = ha+hb;				<- *WHAT*

where:

ha = horizontal active
hb = horizontal blanking
hso = horizontal sync pulse offset (relative to start of blank)
hspw = horisontal sync pulse width

the hardcoded vesa standard modes in vesadb.c seem to use the field
in the right way i think.

interestinly, shs and ehb are rarely given in vgadb and we default
to: shs = shb and ehs = ehb when omited, so this might explain why
stuff works at all.

so what is going on here?

--
cinap