[9fans] double-mapping KZERO in l.s

[9fans] double-mapping KZERO in l.s

[erik quanstrom]

perhaps this is completely obvious, but why are the first
4 mb double-mapped in l.s at virtual address 0 and KZERO?

also, am i mixed up or should the comment about the double
mapping be on the following line?

- erik

/*
 * Now ready to use the new map. Make sure the processor options are what is wanted.
 * It is necessary on some processors to immediately follow mode switching with a JMP instruction
 * to clear the prefetch queues.
 */
	MOVL	$PADDR(CPU0PDB), CX		/* load address of page directory */
	MOVL	(PDO(KZERO))(CX), DX		/* double-map KZERO at 0 */
	MOVL	DX, (PDO(0))(CX)
	MOVL	CX, CR3

Re: [9fans] double-mapping KZERO in l.s

[ron minnich]

On 8/22/07, erik quanstrom <quanstro@coraid.com> wrote:
> perhaps this is completely obvious, but why are the first
> 4 mb double-mapped in l.s at virtual address 0 and KZERO?
>

you start out executing with real memory addresses, i.e. you are
executing code at 0x100000 not at KZERO+0x100000. There is a period of
time where you are executing at those low addresses, then you pop up
to KZERO space and you blow away the low mappings by clearing
PDO(KZERO).

ron

Re: [9fans] double-mapping KZERO in l.s

[erik quanstrom]

where is that time?  what i see in l.s

	MOVL	$_startpg(SB), AX		/* this is a virtual address */
	MOVL	DX, CR0				/* turn on paging */
	JMP*	AX				/* jump to the virtual nirvana */

perhaps i am missing it, but i don't see any point in the code
where there's a problem.  the two instructions that do the switch
access only registers.

- erik

Re: [9fans] double-mapping KZERO in l.s

[ron minnich]

On 8/22/07, erik quanstrom <quanstro@quanstro.net> wrote:
> where is that time?  what i see in l.s
>
>         MOVL    $_startpg(SB), AX               /* this is a virtual address */
>         MOVL    DX, CR0                         /* turn on paging */
>         JMP*    AX                              /* jump to the virtual nirvana */
>
> perhaps i am missing it, but i don't see any point in the code
> where there's a problem.  the two instructions that do the switch
> access only registers.

But the EIP has to access the instructions. After the mov, you're
still at low memory. Paging is turned on at this time. The  JMP is
running at 0x10000something. So you turn paging on and do a jump, but
paging is on when you do the jmp and fetch from low memory. To make
the ifetch work you have to have the low map on.

I'll look at that code tonight again to make sure I'm not imaging
things, but I think this is right.

ron

Re: [9fans] double-mapping KZERO in l.s

[erik quanstrom]

> But the EIP has to access the instructions. After the mov, you're
> still at low memory. Paging is turned on at this time. The  JMP is
> running at 0x10000something. So you turn paging on and do a jump, but
> paging is on when you do the jmp and fetch from low memory. To make
> the ifetch work you have to have the low map on.
> 
> I'll look at that code tonight again to make sure I'm not imaging
> things, but I think this is right.
> 
> ron

that sounds logical to me, i was thinking that this would work because
the processor had already fetched the next instruction.  but, duh,
	mov x, crn
is a serializing instruction.  (amd arch reference, vol 3, p. 280.)

thanks.

- erik