From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <76e8cbf98d79ea6e39ec178daca7929c@collyer.net> To: 9fans@cse.psu.edu Subject: Re: [9fans] Ultrasparc II From: Geoff Collyer MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Date: Wed, 18 Sep 2002 16:45:11 -0700 Topicbox-Message-UUID: eee95a40-eaca-11e9-9e20-41e7f4b1d025 By `here', I meant 9fans. Scott Schwartz's gang at PSU would like more address space, presumably for gene mapping or related work. As for different trap models, etc. in sparcs, it looks to me like all of that stuff is only visible in kernel mode, and the compilers don't generate the relevant instructions *now*, let alone for v9. So adding the v9 instructions by hand to assembler source files or augmenting ka and kl should do the job; I don't think kc is involved. Mixing old and new instructions is expected; that's the whole point of v9's compatibility with older sparc versions. See the v9 spec. for the full story. The situation was different with 2c vs 1c (68020+ vs 68000): 2c was the older compiler and generated instructions and addressing modes not present in the 68000. The Various Ports says of the 68000 compiler ``It generates position-independent code whose overall quality is much poorer than the code for the MC68020.'' and the code differences are not trivial: : cpu; diff -rw [12]c|wc -l 517 : cpu; diff -rw [12]a|wc -l 199 : cpu; diff -rw [12]l|wc -l 940