From mboxrd@z Thu Jan  1 00:00:00 1970
To: 9fans@cse.psu.edu
Date: Tue, 11 Jul 2000 08:51:44 +0000
From: Jakub Jermar <jj@comberg.cz>
Message-ID: <8kdhun$1gk7$1@news.vol.cz>
References: <200007101240.IAA27005@cse.psu.edu>
Subject: Re: [9fans] Kernel question: i386 test-and-set problem
Topicbox-Message-UUID: d6e33ada-eac8-11e9-9e20-41e7f4b1d025

> It looks atomic to me.  The Intel 386 instruction set
> manual says
>
> XCHG exchanges two operands.  The operands can be in either
> order.  If a memory operand is involved, BUS LOCK is
> asserted for the duration of the exchange, regardless of the
> presence or absence of the LOCK prefix or of the value of
> the IOPL.

Ok, thank you for clarification. Now I see how it works. It really is atomic
in the terms of atomic exchange (which is good because nobody can be
exchanging it concurrently). Looks like I was confused by its name -
test-and-set - which it is really not. It's rather
safely-set-and-leave-the-test-to-the-caller.

Thanks,
Jakub Jermar