From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <949f4efc668a768d724d2b5399f49e7a@coraid.com> From: erik quanstrom Date: Tue, 27 Mar 2007 20:06:22 -0400 To: 9fans@cse.psu.edu Subject: Re: [9fans] non-PC hardware In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Topicbox-Message-UUID: 34758ef6-ead2-11e9-9d60-3106f5b1d025 > Despite having just sold off the X-Scale embedded to Marvel, I expect Intel to get back into the embedded game with ultra low power X86 chips. Alpha is gone, Sparc is Sun only, MIPs might survive as an embedded architecture. intel still sells embedded xscale processors. i looked at this a while back http://www.intel.com/design/network/prodbrf/309430.htm kind of looks like a network-cell processor, doesn't it? > I think all of the Intel chips going forward are going have EM64T. So plan9 should have good support for that. Plus you get 8 more registers with EM64T, which the architecture could really use. i'm not sure what advantage more registers present in modern (amd|intel)/x64 chips. a value in l1 cache is only 1 cycle away. so i'm not sure what the practical difference is between something in a register and something in l1. > Because the new Apple stuff is X86 based, ports shouldn't be too hard, delta chip support. i'd agree with it not being hard. but that is a considerable amount of work. granted, most architechtures are not as bad as the pee cee, but one still has to interface with the boot rom, figure out how to find and configure memory, set up interrupts, figure out how to talk to the bus, how to print "hello, world", etc. ignoring the pc, since it's a pig, here's how much code is in each of the various ports (my somewhat out-of-date copy): bitsy 15240 ppc 10315 mtx 7863 while new ports will be great, you need to be prepared for some heavy lifting. - erik