From mboxrd@z Thu Jan 1 00:00:00 1970 MIME-Version: 1.0 In-Reply-To: References: <8668dded1f0a71f7c699f3f4ee7cf18c@kw.quanstro.net> Date: Mon, 21 Jun 2010 09:38:05 -0700 Message-ID: From: David Leimbach To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net> Content-Type: multipart/alternative; boundary=000e0cd6ac98d3060904898ceddc Subject: Re: [9fans] A little ado about taslock Topicbox-Message-UUID: 35ffbd38-ead6-11e9-9d60-3106f5b1d025 --000e0cd6ac98d3060904898ceddc Content-Type: text/plain; charset=ISO-8859-1 On Mon, Jun 21, 2010 at 9:28 AM, Lyndon Nerenberg wrote: > 2. if today 16 machs are possible (and 128 on an intel xeon mp 7500? >> 8 sockets * 8 core * 2t = 128), what do we expect in 5 years? 128? >> > > www.seamicro.com > > There's a 100 core MIPS-like board available now too. http://www.tilera.com/ Dave --000e0cd6ac98d3060904898ceddc Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable

On Mon, Jun 21, 2010 at 9:28 AM, Lyndon = Nerenberg <lyndon= @orthanc.ca> wrote:
2. =A0if today 16 machs are possible (and 128 on an intel xeon mp 7500?
8 sockets * 8 core * 2t =3D 128), what do we expect in 5 years? =A0128?

www.seamicro.com<= br>
There's a 100 core MIPS-like board available now too= .


Dave
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