From: Venkatesh Srinivas <me@acm.jhu.edu>
To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net>
Subject: [9fans] A little ado about taslock
Date: Mon, 21 Jun 2010 03:25:32 -0400 [thread overview]
Message-ID: <AANLkTinzxR0X40SrF6iaA_qdYzNV4wOfOI6Mr7CgtTfY@mail.gmail.com> (raw)
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Hi,
Erik's thread about a 16-processor x86 machine convinced me to try something
related to spinlocks.
The current 9 spinlocks are portable code, calling an arch-provided tas() in
a loop to do their thing. On i386, Intel recommends 'PAUSE' in the core of a
spin-lock loop; I modified tas to PAUSE (0xF3 0x90 if you prefer) if the
lock-acquire attempt failed.
In a crude test on a 1.5GHz p4 willamette with a local fossil/venti and
256mb of ram, 'time mk 'CONF=pcf' > /dev/null' in /sys/src/9/pc, on a
fully-built source tree, adding the PAUSE reduced times from an average of
18.97s to 18.84s (across ten runs).
I tinkered a bit further. Removing the increments of glare, inglare and
lockstat.locks, coupled with the PAUSE addition, reduced the average real
time to 18.16s, again across 10 runs.
If taslock.c were arch-specific, we could almost certainly do better - i386
doesn't need the coherence() call in unlock, we could safely test-and-tas
rather than than raw tas().
There're also other places to look at too, wrt to application of
arch-specific bits; see:
http://code.google.com/p/inferno-npe/source/detail?r=b83540e1e77e62a19cbd21d2eb54d43d338716a5for
what XADD can do for incref/decref. Similarly, pc/l.s:_xdec could be
much shorter, again using XADD.
None of these are a huge deal; just thought they might be interesting.
Take care,
-- vs
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next reply other threads:[~2010-06-21 7:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-21 7:25 Venkatesh Srinivas [this message]
2010-06-21 14:21 ` erik quanstrom
2010-06-21 16:28 ` Lyndon Nerenberg
2010-06-21 16:38 ` David Leimbach
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