From mboxrd@z Thu Jan 1 00:00:00 1970 MIME-Version: 1.0 References: In-Reply-To: From: =?UTF-8?Q?Rodrigo_G=2E_L=C3=B3pez?= Date: Fri, 26 Jul 2019 14:04:29 +0200 Message-ID: To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net> Content-Type: multipart/alternative; boundary="000000000000eee867058e945828" Subject: Re: [9fans] Plan 9 C compiler for Xtensa CPUs Topicbox-Message-UUID: 030c57e8-eada-11e9-9d60-3106f5b1d025 --000000000000eee867058e945828 Content-Type: text/plain; charset="UTF-8" you are one of the few who could pull that off. the alternative would be to send the board to cinap, and he'd probably deploy a compiler+kernel in a couple of weeks. On Fri, Jul 26, 2019, 12:31 PM Charles Forsyth wrote: > I was thinking of doing that since I've got an ESP-32 for some reason > > On Fri, Jul 26, 2019 at 7:38 AM Cyber Fonic wrote: > >> I was reading the post Why Didn't Plan 9 Succeed >> on Hacker News. >> >> Made me think that Plan 9 for IoT system of systems could be viable. >> >> To that end, ESP-32 modules look capable enough to run Plan 9, but is >> there a Plan 9 C compiler for Xtensa ISA CPUs? >> >> --000000000000eee867058e945828 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
you are one of the few who could pull that off.
the alternative would be to send the board to cinap, and= he'd probably deploy a compiler+kernel in a couple of weeks.

On Fri, Jul 26, 2019, 12:31 PM Charles Forsyth <charles.forsyth@gmail.com> wrote:
I was thinking of doing that s= ince I've got an ESP-32 for some reason

On Fri, Jul 26, 2019 at 7:38 AM = Cyber Fonic <cyberfonic@gmail.com> wrote:
I was reading the po= st=C2=A0Why Didn't Plan 9 Succeed=C2=A0on Ha= cker News.

Made me think that Plan 9 for IoT system of s= ystems could be viable.

To that end, ESP-32 module= s look capable enough to run Plan 9, but is there a Plan 9 C compiler for X= tensa ISA CPUs?=C2=A0

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