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From: =?UTF-8?B?QXJhbSBIxIN2xINybmVhbnU=?= <aram.h@mgk.ro>
Date: Thu,  4 Feb 2016 11:08:18 +0100
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To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net>
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Subject: Re: [9fans] FP register usage in Plan9 assembler
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On Wed, Feb 3, 2016 at 4:24 PM, erik quanstrom <quanstro@quanstro.net> wrot=
e:
> i love the consistency from one architecture to another.

Just like how different architectures use different order for CMP
arguments. Very consistent.

Or just how some architectures use typed registers, and some use
different-sized instruction variants.

Or just how most instructions use left-to-right dataflow order, some
instructions use right-to-left.

I could go on. Plan 9 assembly is nice because it looks mostly the
same, and the simple addressing modes are mostly consistent, but it's
far from being really consistent between architectures.

--=20
Aram H=C4=83v=C4=83rneanu