From mboxrd@z Thu Jan 1 00:00:00 1970 MIME-Version: 1.0 In-Reply-To: <7aa1f8ae5b628668@orthanc.ca> References: <7aa1f8ae5b628668@orthanc.ca> From: hiro <23hiro@gmail.com> Date: Wed, 10 Oct 2018 07:57:33 +0200 Message-ID: To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net> Content-Type: text/plain; charset="UTF-8" Subject: Re: [9fans] PDP11 (Was: Re: what heavy negativity!) Topicbox-Message-UUID: eabd80cc-ead9-11e9-9d60-3106f5b1d025 > via USB and see how it stands up. But the real question is what > kind of delay, latency, and jitter will there be, getting that raw > I/Q data from the USB interface up to the consuming application? How is your proposal of zero-copy going to help latency? IIRC we have some real-time thingy, might be able to reduce jitter... But then I might also ask why you're not doing the most critical path on an fpga anyway? Start with identifying your worst bottleneck. > Eliminating as much of the copy in/out WRT the kernel cannot but > help wrong, this design change requires ressources, too, and might gain you higher complexity. measure first.