I'm studying the 9front's amd64 kernel, and I'm pretty new to assembler programming, so sorry if my question is too dumb...

I cannot understand the FP pseudo register usage.

The cpuid function, for example, is implemented as

/*
* The CPUID instruction is always supported on the amd64.
*/
TEXT cpuid(SB), $-4
    MOVL    RARG, AX            /* function in AX */
    CPUID

    MOVQ    info+8(FP), BP
    MOVL    AX, 0(BP)
    MOVL    BX, 4(BP)
    MOVL    CX, 8(BP)
    MOVL    DX, 12(BP)
    RET

What I miss is where "info" comes from. I cannot

Apparently the GAS equivalent is:

.align 4
.globl cpuid
cpuid:
    mov    %ebp,%eax
    cpuid
    mov    0x10(%rsp),%rbp
    mov    %eax,0x0(%rbp)
    mov    %ebx,0x4(%rbp)
    mov    %ecx,0x8(%rbp)
    mov    %edx,0xc(%rbp)
    retq

Thus apparently info+8(FP) becomes 0x10(%rsp)
Why? I know that FP is a pseudo register, but shouldn't it be different from SP?

And why info's value is 8? Is it the pointer size?

Another example:

TEXT insb(SB), 1, $-4
    MOVL    RARG, DX            /* MOVL    port+0(FP), DX */
    MOVQ    address+8(FP), DI
    MOVL    count+16(FP), CX
    CLD
    REP;    INSB
    RET

should be equivalent to

.align 4
.globl insb
insb:
    mov    %ebp,%edx
    mov    0x10(%rsp),%rdi
    mov    0x18(%rsp),%ecx
    cld
    rep insb
    retq

Again I cannot find a definition of address and count, but both seem to be be valued as 8, why?

Giacomo