Re: [9fans] MIPS LE fp register ordering in MOVD

[Bruce Ellis <bruce.ellis@gmail.com>]

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Vita got the good gear. Ken said something about no need for them to find
the bugs again. Halcyon days.

We used 0? for RM4700 and later the QED7000.

brucee
 On 28 Dec 2013 12:24, "cherry" <lunaria21@gmail.com> wrote:

>
>
>
> On Thu, Dec 26, 2013 at 11:32 PM, Bruce Ellis <bruce.ellis@gmail.com>wrote:
>
>> You might be able to blame the play station 2 and the two different MIPS
>> chips it had. I did two compilers. The FP was very unusual and one was LE
>> and the other BE. Inferno port worked well.
>>
>
> Thanks very much for your hint. Inferno's 0l uses fnuxi4, whereas its vl
> uses fnuxi8, just like Plan 9's. I adopted the Inferno 0l's way, and added
> one line in obj.c to set fnuxi4 for BE, as well as the corresponding debug
> output. This seems to work with both BE and LE. For BE it gives the same
> output as before.
>
> diff /sys/src/cmd/vl/asm.c ./asm.c
> 672c672
> <                     buf.dbuf[l] = cast[fnuxi8[i+4]];
> ---
> >                     buf.dbuf[l] = cast[fnuxi4[i]];
> diff /sys/src/cmd/vl/obj.c ./obj.c
> 1391a1392
> >             fnuxi4[i] = c;
> 1415a1417,1419
> >         for(i=0; i<4; i++)
> >             Bprint(&bso, "%d", fnuxi4[i]);
> >         Bprint(&bso, " ");
>
> Does this break anything? If not, I will submit a patch.
>
> Thanks,
> - cherry
>
>

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