Re: [9fans] MIPS LE fp register ordering in MOVD

[Bruce Ellis <bruce.ellis@gmail.com>]

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You might be able to blame the play station 2 and the two different MIPS
chips it had. I did two compilers. The FP was very unusual and one was LE
and the other BE. Inferno port worked well.

brucee


On 27 December 2013 14:41, cherry <lunaria21@gmail.com> wrote:

>
>
>
> On Thu, Dec 26, 2013 at 6:46 PM, cherry <lunaria21@gmail.com> wrote:
>
>> Another issue is 0l/vl seems to output wrong bits for single precision
>> floats in little endian mode, due to a similar reason: it used bytes 4-7
>> instead of 0-3. This seems to fix it:
>>
>> % diff /sys/src/cmd/vl/asm.c asm.c
>> 672c672,675
>> <                     buf.dbuf[l] = cast[fnuxi8[i+4]];
>> ---
>> >                     if(little)
>> >                         buf.dbuf[l] = cast[fnuxi8[i]];
>> >                     else
>> >                         buf.dbuf[l] = cast[fnuxi8[i+4]];
>>
>> An alternative fix would be simply use fnuxi4 instead of fnuxi8, so that
>> both BE and LE would work (I guess, don't have BE machine to test).
>>
>
> Indeed I can test it, simply diff the output of vl before and after.
> Using, fnuxi4 does NOT work for BE, as fnuxi4 is only set for LE
> (obj.c:1385,1404), probably due to (the same or another) historical reason.
>
> - cherry
>
>

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