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Date: Thu,  4 Feb 2016 15:26:12 +0000
Message-ID: <CAOw7k5iB2B8BLhMbmUJu=AqqiPas73xx=vrWCvueWPp5YO310A@mail.gmail.com>
From: Charles Forsyth <charles.forsyth@gmail.com>
To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net>
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Subject: Re: [9fans] FP register usage in Plan9 assembler
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On 4 February 2016 at 15:22, erik quanstrom <quanstro@quanstro.net> wrote:

> MOVQQU or MOVQQA still follow the expected pattern.


Originally on amd64 I consistently used O instead of sometimes DQ and
sometimes O as Intel did,
but in the end I changed them back to the Intel names, since it was hard to
look them up,
and there were so many.

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<div dir=3D"ltr"><div class=3D"gmail_extra"><br><div class=3D"gmail_quote">=
On 4 February 2016 at 15:22, erik quanstrom <span dir=3D"ltr">&lt;<a href=
=3D"mailto:quanstro@quanstro.net" target=3D"_blank">quanstro@quanstro.net</=
a>&gt;</span> wrote:<br><blockquote class=3D"gmail_quote" style=3D"margin:0=
 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">MOVQQU or MOVQQA sti=
ll follow the expected pattern.</blockquote></div><br>Originally on amd64 I=
 consistently used O instead of sometimes DQ and sometimes O as Intel did,<=
/div><div class=3D"gmail_extra">but in the end I changed them back to the I=
ntel names, since it was hard to look them up,</div><div class=3D"gmail_ext=
ra">and there were so many.</div></div>

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