From mboxrd@z Thu Jan 1 00:00:00 1970 MIME-Version: 1.0 References: In-Reply-To: From: Charles Forsyth Date: Wed, 7 Aug 2019 01:22:59 +0100 Message-ID: To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net> Content-Type: multipart/alternative; boundary="0000000000003453bf058f7bf290" Subject: Re: [9fans] Plan 9 C compiler for Xtensa CPUs Topicbox-Message-UUID: 0364b73a-eada-11e9-9d60-3106f5b1d025 --0000000000003453bf058f7bf290 Content-Type: text/plain; charset="UTF-8" I've not previously seen an architecture where so many cache and TLB control instructions were in the primary space and took up so much of it. On Fri, Jul 26, 2019 at 11:30 AM Charles Forsyth wrote: > I was thinking of doing that since I've got an ESP-32 for some reason > > On Fri, Jul 26, 2019 at 7:38 AM Cyber Fonic wrote: > >> I was reading the post Why Didn't Plan 9 Succeed >> on Hacker News. >> >> Made me think that Plan 9 for IoT system of systems could be viable. >> >> To that end, ESP-32 modules look capable enough to run Plan 9, but is >> there a Plan 9 C compiler for Xtensa ISA CPUs? >> >> --0000000000003453bf058f7bf290 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
I've not previously seen an architecture where so many= cache and TLB control instructions were in the primary space and took up s= o much of it.


On Fri, Jul 26, 2019 at 11:30 AM Charles Fors= yth <charles.forsyth@gmail.= com> wrote:
I was thinking of doing that since I've got an ESP-= 32 for some reason

On Fri, Jul 26, 2019 at 7:38 AM Cyber Fonic <cyberfonic@gmail.com= > wrote:
I was reading the post=C2=A0Why Didn't Plan 9 Succeed=C2=A0on Hacker News.

Made me think that Plan 9 for Io= T system of systems could be viable.

To that end, = ESP-32 modules look capable enough to run Plan 9, but is there a Plan 9 C c= ompiler for Xtensa ISA CPUs?=C2=A0

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