From: Charles Forsyth <charles.forsyth@gmail.com>
To: Fans of the OS Plan 9 from Bell Labs <9fans@9fans.net>
Subject: Re: [9fans] Plan 9 C compiler for Xtensa CPUs
Date: Fri, 9 Aug 2019 16:50:40 +0100 [thread overview]
Message-ID: <CAOw7k5jc29g4K3H16NR7S4_LMsRKSM46P+vhCdZt3SxqsAsG8Q@mail.gmail.com> (raw)
In-Reply-To: <CAOw7k5icSZpFGnHqsU8P5Q5t6XEEV-ZZ9rPNoaqKiab7O_cceQ@mail.gmail.com>
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The device I've got is ESP32-WROOM-32. None of the boards I've seen that
use it bother with external memory,
so memory is limited, especially the way it's partitioned.
On Fri, Aug 9, 2019 at 3:50 PM Charles Forsyth <charles.forsyth@gmail.com>
wrote:
> The ESP32 has got several MMUs. The characteristics are different
> depending on the part that a given MMU accesses (flash, ROM, SRAM, external
> memory).
> Some things are accessed using Memory Protection Units instead, which
> control access by Process ID, but don't do mapping. Others including some
> of the SRAMs are accessed through
> an MMU that can do virtual to physical mapping. The MMUs for internal
> SRAM0 and 2 choose protection for a given physical page as none, one or all
> of PIDs 2 to 7, with the virtual address that
> maps to it. PIDs 0 and 1 can access everything. PID 0 can execute
> privileged instructions.
> A large chunk of SRAM (SRAM 1) has only Memory Protection and no
> translation. The external memory MMU is the most general (most
> conventional).
>
> On Fri, Aug 9, 2019 at 3:19 PM Bakul Shah <bakul@bitblocks.com> wrote:
>
>> esp32 doesn’t have an mmu, right?
>>
>> On Jul 26, 2019, at 03:30, Charles Forsyth <charles.forsyth@gmail.com>
>> wrote:
>>
>> I was thinking of doing that since I've got an ESP-32 for some reason
>>
>> On Fri, Jul 26, 2019 at 7:38 AM Cyber Fonic <cyberfonic@gmail.com> wrote:
>>
>>> I was reading the post Why Didn't Plan 9 Succeed
>>> <https://news.ycombinator.com/item?id=20527650> on Hacker News.
>>>
>>> Made me think that Plan 9 for IoT system of systems could be viable.
>>>
>>> To that end, ESP-32 modules look capable enough to run Plan 9, but is
>>> there a Plan 9 C compiler for Xtensa ISA CPUs?
>>>
>>>
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next prev parent reply other threads:[~2019-08-09 15:50 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-26 6:37 Cyber Fonic
2019-07-26 10:02 ` Rodrigo G. López
2019-07-26 10:30 ` Charles Forsyth
2019-07-26 12:04 ` Rodrigo G. López
2019-07-26 12:12 ` Cyber Fonic
2019-07-26 15:23 ` Charles Forsyth
2019-07-27 9:16 ` Anthony Martin
2019-07-27 11:10 ` Richard Miller
2019-07-27 16:29 ` Anthony Martin
2019-08-07 0:22 ` Charles Forsyth
2019-08-07 8:07 ` Lucio De Re
2019-08-09 14:17 ` Bakul Shah
2019-08-09 14:50 ` Charles Forsyth
2019-08-09 15:50 ` Charles Forsyth [this message]
2019-08-09 21:34 ` Charles Forsyth
2019-08-09 21:48 ` Shane Morris
2019-08-09 22:51 ` Bakul Shah
2019-08-09 22:53 ` Skip Tavakkolian
2019-08-10 9:09 ` Cyber Fonic
2019-08-10 9:15 ` Shane Morris
2019-08-10 16:18 ` Charles Forsyth
2019-08-11 18:59 ` Lyndon Nerenberg
2019-08-18 14:10 ` Charles Forsyth
2019-08-18 14:28 ` Richard Miller
2019-08-19 11:51 ` Cyber Fonic
2019-08-19 14:52 ` [9fans] Plan 9 security Ethan Gardener
2019-08-20 13:13 ` Cyber Fonic
2019-08-20 13:28 ` Don A. Bailey
2019-08-23 18:45 ` Ethan Gardener
2019-08-23 19:41 ` Don Bailey
2019-07-26 13:16 [9fans] Plan 9 C compiler for Xtensa CPUs cinap_lenrek
2023-12-04 23:20 David Boddie
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