Re: [9fans] risc-v memory layout

[ron minnich <rminnich@gmail.com>]

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you can't avoid M mode on riscv, ever. There are several trap cases that
will drop you in to M mode.

And M mode does not have paging, so it will always be using what x86 would
call real memory addresses.

Given that, the more I look at this, the more I want Plan 9 KVA do be
0->1<<60 or so, and UVA to be above that.

I have not yet seen a reason this won't work. It's just not like an x86 :-)

thanks
Ron

P.S. Richard, this is all your fault, your comment a few days ago got me to
thinking. Always a bad idea :-)

On Wed, Jan 7, 2026 at 5:46 AM Richard Miller <9fans@hamnavoe.com> wrote:

> <rminnich@gmail.com>:
> > M mode, for
> > example, has no virtual addressing, and it would be useful (to say the
> > least) to have kernel and M mode have a common set of addresses.
> 
> Basic question: when would you use M mode? Doesn't the kernel normally
> run entirely in Supervisor mode? Will the firmware on your platform even
> allow Plan 9 to get into M mode?
> 

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