From mboxrd@z Thu Jan  1 00:00:00 1970
To: 9fans@cse.psu.edu
From: "Douglas A. Gwyn" <DAGwyn@null.net>
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References: <000d01c3fddf$72cc45b0$2bdcfea9@blue>, <00c801c3fdff$414b7d60$26fea8c0@SOMA>
Subject: Re: [9fans] Threads: Sewing badges of honor onto a Kernel
Date: Mon,  1 Mar 2004 10:35:31 +0000
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boyd, rounin wrote:
> get real, we're no longer using 1 MIP VAXes, where TLB flushes
> etc were a real problem.  128 users on an 11/780, anyone?

There are a large number of platforms where there are
important constraints imposed by the MMU architecture.
Consider what it means when an OS requires such resources
that it cannot feasibly be implemented on a VAX, yet does
almost nothing more than could have readily been done
(with a different design) on a VAX.  It's nearly as bad
as a 1GHz machine getting so bogged down with GUI code
and poor interface design that some common tasks take
longer to accomplish than on a 1MHz PDP-11 running Unix.
(Whose "Law" was it that said that file storage always
expands to fill whatever disk resources are available?
The same thing seems to apply to CPU cycles.)