From: erik quanstrom <quanstro@quanstro.net>
To: 9fans@9fans.net
Subject: Re: [9fans] new arm port: teg2
Date: Sun, 6 May 2012 08:38:17 -0400 [thread overview]
Message-ID: <a5aa01aafdf4408136791cce27ef026f@kw.quanstro.net> (raw)
In-Reply-To: <955e22468668dee5e11c6c1b79ed897f@plan9.bell-labs.com>
On Tue May 1 18:31:54 EDT 2012, geoff@plan9.bell-labs.com wrote:
> After you pull, you should see a new directory,
> /sys/src/9/teg2. From the _announce file:
>
> This is a preliminary Plan 9 port to the Compulab Trimslice,
> containing a Tegra 2 SoC: a dual-core, (truly) dual-issue 1GHz
> Cortex-A9 v7a-architecture ARM system, *and* it comes in a case. VFP
> 3 floating-point hardware is present, but 5l doesn't yet generate
> those instructions. This is the first multiprocessor ARM port we've
> done, and much of the code should be reusable in future ports. There
> are still things to be done but it can run both processors and is
> believed to have adequate kernel support for VFP 3 floating-point.
excellent. i've just had time to look at the block diagram.
is there a jtag connector somewhere?
- erik
next prev parent reply other threads:[~2012-05-06 12:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-01 22:30 geoff
2012-05-01 22:48 ` John Floren
2012-05-01 23:58 ` Anthony Sorace
2012-05-02 0:55 ` David Leimbach
2012-05-02 0:58 ` Charles Forsyth
2012-05-06 12:38 ` erik quanstrom [this message]
2012-05-06 12:45 ` hiro
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