From: erik quanstrom <quanstro@quanstro.net>
To: 9fans@9fans.net
Subject: Re: [9fans] waitfree
Date: Mon, 19 May 2014 18:05:57 -0400 [thread overview]
Message-ID: <c50dff498502b93c8e9513c0cbbb1ffd@ivey> (raw)
In-Reply-To: <CAFgOgC91+3NNYAfp0FYS6uEaktWhLfNfr=xcVWFGJBS_-_-i1Q@mail.gmail.com>
On Mon May 19 17:02:57 EDT 2014, devon.odell@gmail.com wrote:
> So you seem to be worried that N processors in a tight loop of LOCK
> XADD could have a single processor. This isn't a problem because
> locked instructions have total order. Section 8.2.3.8:
>
> "The memory-ordering model ensures that all processors agree on a
> single execution order of all locked instructions, including those
> that are larger than 8 bytes or are not naturally aligned."
i don't think this solves any problems. given thread 0-n all executing
LOCK instructions, here's a valid ordering:
0 1 2 n
lock stall stall ... stall
lock stall stall ... stall
... ...
lock stall stall ... stall
i'm not sure if the LOCK really changes the situation. any old exclusive
cacheline access should do?
the documentation appears not to cover this completely.
- erik
next prev parent reply other threads:[~2014-05-19 22:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-19 17:34 erik quanstrom
2014-05-19 19:49 ` Devon H. O'Dell
2014-05-19 20:21 ` erik quanstrom
2014-05-19 21:01 ` Devon H. O'Dell
2014-05-19 22:05 ` erik quanstrom [this message]
2014-05-19 22:14 ` ron minnich
2014-05-19 22:18 ` erik quanstrom
2014-05-20 1:10 ` Devon H. O'Dell
2014-05-20 2:12 ` erik quanstrom
2014-05-20 14:47 ` Devon H. O'Dell
2014-05-20 15:41 ` erik quanstrom
2014-05-20 19:14 ` Devon H. O'Dell
2014-05-20 19:30 ` erik quanstrom
2014-05-20 20:32 ` Devon H. O'Dell
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