From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: To: 9fans@cse.psu.edu Subject: Re: [9fans] Non-stack-based calling conventions Date: Wed, 27 Feb 2008 06:26:53 +0200 From: lucio@proxima.alt.za In-Reply-To: <9f3897940802261330p63249ba2r6c302dbd897ef48b@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Topicbox-Message-UUID: 63dffad6-ead3-11e9-9d60-3106f5b1d025 > I've got some time to delve into Fascicle One again and indeed, MMIX > doesn't have any stack at all. When you need stack, you implement it > yourself. Anyone knows of other CPU's using this method for stack > (i.e. no in-built support for stack in memory)? There is stack based > on registers, though. Current or obsolete architectures? The Sperry Univac 1100 Series, designed by Seymour Craye (sp? it's been a long time) had no hardware supported stack, although it had a bit in the 36-bit instruction that caused the signed upper half of the selected index register to be added to the lower half. I don't remember whether it was before or after applying the index to the base address in the lower 16 bits of the instruction, it would need to be fixed one way (post-increment, I think) because it was unlikely to check the sign of the upper half before deciding. Bloody marvellous, it was. Specially as it was the first computer I ever worked on. I have extremely fond memories of it. I can easily wax nostalgic about it. Hm, maybe I should look for a simulator for it, anyone know of one? ++L