From mboxrd@z Thu Jan  1 00:00:00 1970
Message-ID: <e2749af9cfe58d856e26ae8a24893084@felloff.net>
Date: Sun, 13 Sep 2015 10:09:50 +0200
From: cinap_lenrek@felloff.net
To: 9fans@9fans.net
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Subject: [9fans] kenc vlong <asop> double
Topicbox-Message-UUID: 6a1aa22e-ead9-11e9-9d60-3106f5b1d025

the following code generates unhandled instructions
for the linker on 64 bit simulating archs (8c, 5c):

vlong v;
double d;
v += d;

 == cgen ==
ASADD DOUBLE (1) a.c:13
   NAME "v" -8 <11> VLONG a.c:13
   NAME "d" -16 <11> DOUBLE a.c:13

term% 8c -S a.c
	...
	FMOVD	d+-16(SP),F0
	MOVL	v+-8(SP),F0			<- nope.
	FADDDP	F0,F1
	MOVL	F0,v+-8(SP)			<- nope.
	RET	,
	END	,

but works on amd64:

term% 6c -S a.c
	...
	CVTSQ2SD	v+-8(SP),X0
	ADDSD	d+-16(SP),X0
	CVTTSD2SQ	X0,CX
	RET	,

the following code works on 8c/5c:

v = v + d;

 == cgen ==
AS VLONG (100) a.c:13
   NAME "v" -8 <11> VLONG a.c:13
   FUNC VLONG (100) a.c:13
      NAME "_d2v" 0 <10> FUNC VLONG a.c:1
      ADD DOUBLE (100) a.c:13
         FUNC DOUBLE (100) a.c:13
            NAME "_v2d" 0 <10> FUNC DOUBLE a.c:1
            NAME "v" -8 <11> VLONG a.c:13
         NAME "d" -16 <11> DOUBLE a.c:13


term% 8c -S a.c
	....
	MOVL	v+-8(SP),AX
	MOVL	AX,(SP)
	MOVL	v+-4(SP),AX
	MOVL	AX,4(SP)
	CALL	,_v2d+0(SB)
	FADDD	d+-16(SP),F0
	FMOVDP	F0,.safe+-28(SP)
	LEAL	v+-8(SP),AX
	MOVL	AX,(SP)
	FMOVD	.safe+-28(SP),F0
	FMOVDP	F0,4(SP)
	CALL	,_d2v+0(SB)

any ideas how to fix this?

--
cinap