From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: From: Charles Forsyth To: 9fans@cse.psu.edu Subject: Re: [9fans] ATA next In-Reply-To: <20040123071911.G28365@cackle.proxima.alt.za> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Date: Fri, 23 Jan 2004 09:11:31 +0000 Topicbox-Message-UUID: bf8057c0-eacc-11e9-9e20-41e7f4b1d025 >>It all puts the lie to the above. I must conclude that something >>in the interrupt handling rather than in the ATA DMA code has >>changed to cause so many more int 7s to occur. I'm looking forward i thought IRQ7 was generated when a device requested an interrupt then incorrectly removed that irq signal before the cpu acknowledged it. a quick google search seems to confirm that. see http://www.geocrawler.com/archives/3/171/2000/5/0/3704984/ (ie, it's not the driver code as such that causes it, but the hardware.) i wonder, though, whether it can happen if an interrupt is configured as level-triggered in the controller or system but is actually edge-triggered. i didn't think there were level-triggered interrupts on a system without PCI, but perhaps there are. you might check your system's BIOS settings