From mboxrd@z Thu Jan 1 00:00:00 1970 From: erik quanstrom Date: Thu, 4 Feb 2016 07:22:48 -0800 To: 9fans@9fans.net Message-ID: In-Reply-To: <0b1b24abbe6bbc91cf6c6038c2684eeb@lilly.quanstro.net> References: <0b1b24abbe6bbc91cf6c6038c2684eeb@lilly.quanstro.net> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Subject: Re: [9fans] FP register usage in Plan9 assembler Topicbox-Message-UUID: 82a73be0-ead9-11e9-9d60-3106f5b1d025 On Thu Feb 4 07:15:03 PST 2016, quanstro@quanstro.net wrote: > > Or just how some architectures use typed registers, and some use > > different-sized instruction variants. > > which architeture uses typed registers? a quick check of 386, 68020, > alpha, arm, mips, power, power64, sparc, and amd64 shows all use > MOV[WLQ]. i see charles has answered this. and the issue is mostly with corner cases, and architectural oddities. MOVQQU or MOVQQA still follow the expected pattern. - erik