Re: [9fans] myricom 10 gigabit ethernet

[erik quanstrom <quanstro@coraid.com>]

> erik quanstrom wrote:
>> this is not correct.  please read http://en.wikipedia.org/wiki/Peripheral_Component_Interconnect
>> even at 33 mhz, pci has 133MB/s of bandwidth.  gbe uses about 112MB/s.
>> 
>> although there are some lower standards defined, pci-x has a practical base
>> frequency of 133Mhz * 64 bits which is over 1GB/s.
>> 
>> pcie is (8/10)*2.5gbit bidirectional per lane.  just 1 lane is required for gbe.
>> 
> 
> Do you suppose there is nothing else wanting to 'do work' on, or use that bus?
> Or place 'non-bus' demands on the rest of the system?

pci-[ex] "busses" aren't shared resources.  they are point-to-point links.  there is 
no contention on a pci-[ex] link.

also, even modestly modern machines have multiple pci busses. my 997Mhz pIII
hand-me-down has 3 and my 450Mhz 440gx fileserver has 2.

> 
> 4 x Gig-E is about the most you can keep up with and still do 'useful work', 
> even with twin dual-core AMD.
> 
> - unless you have the cash for Many-MP IBM Power5 / Power6 ?
> 
> Everyone wants to add-up the 'best case' burst rates for every component.

do you have any data to back this up?  

> Reality is to take the worst-case, then focus on fixing those bottlenecks first.
> 
> As usual. the main one is *money*...

isn't that too easy?   i think that if i take that attitude as a software engineer,
i won't look at what my software's doing and work to make it better.

i believe the fundamental bottleneck is ideas.  without a good idea, unlimited
wherewithall buys nothing.

- erik