From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: Date: Wed, 24 Nov 2004 00:18:17 -0500 From: jmk@plan9.bell-labs.com To: 9fans@cse.psu.edu Subject: Re: [9fans] archmp In-Reply-To: <7DD37218104E31429E79EB0BB136800E11C4E5@vargas.ntdom.cupdx> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Topicbox-Message-UUID: 0b17be16-eace-11e9-9e20-41e7f4b1d025 On Tue Nov 23 23:45:12 EST 2004, BHuntsman@mail2.cu-portland.edu wrote: > ... was looking through the files archmp.c, apic.c, and mp.c.(386 only) > Interestingly, they appear in Inferno too. Native Inferno can run with SMP? > > Is there any documentation on how the mp system works? > (I know I could always just read the sources, but I'd appreciate someone > pointing me in the right direction...) How do we get all the CPU's > initialized, and can we start/stop them individually after boot? Also, > are there MP sources for other cpu types? > > Thanks all! > > -Ben > Plan 9 was designed to run on multiprocessors from the start, MP is not a bolt-on bag on the side, so 'how the mp system works' is really just how Plan 9 works. The code in the PC-specific files you mention is mostly to to parse the configuration information supplied by the BIOS as to how many processors there are and how interrupts are routed. The remainder of the code starts up the processors and deals with the interupt hardware (a different interrupt controller, the APIC, is used on x86 MP systems). The fact that the system is inherently designed to run on multiprocessors means that the architecture-specific code is pretty well isolated to dealing with startup and interrupts. The first 'real' Plan 9 fileserver and cpuserver ran on SGI Power series machines, 2 and 4 processors respectively. Later, the SGI Challenge was used as a cpuserver. The x86 code is the only MP code available under the current licence that I am aware of; it's pretty old now too. --jim