From: covertusername967@gmail.com
To: 9front@9front.org
Subject: Re: [9front] Kernel panic when setting screen resolution on machine with i810 chipset
Date: Wed, 4 Dec 2019 23:56:36 -0600 [thread overview]
Message-ID: <204ACD121EE292BCFAF9B960F9F63380@gmail.com> (raw)
In-Reply-To: FFEEA8722D5AA0F796D737E1AC3D52F5@felloff.net
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From /sys/src/cmd/aux/vga/i81x.c:
/* <<TODO>>
i830 LCD Controller, at i81x->mmio+0x60000
i81x->lcd[0]: Horizontal Total Reg. 0x60000
i81x->lcd[1]: Horizontal Blanking Reg. 0x60004
i81x->lcd[2]: Horizontal Sync Reg. 0x60008
i81x->lcd[3]: Vertical Total Reg. 0x6000c
i81x->lcd[4]: Vertical Blanking Reg. 0x60010
i81x->lcd[5]: Vertical Sync Reg. 0x60014
i81x->lcd[6]: Pixel Pipeline A Sequencer Register Control(SRC,0~7) 0x6001c
i81x->lcd[7]: BCLRPAT_A 0x60020
i81x->lcd[8]: 0
*/
This matches the LCD registers in the specsheet, but these are never
initialized. It looks like the LCD part of the driver was simply
never finished...
I'm mostly just putting this here for posterity. This won't get fixed
if I just sit here and whine about it, and I intend to do something
about that.
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From: cinap_lenrek@felloff.net
To: 9front@9front.org
Subject: Re: [9front] Kernel panic when setting screen resolution on machine with i810 chipset
Date: Tue, 3 Dec 2019 19:44:26 +0100
Message-ID: <FFEEA8722D5AA0F796D737E1AC3D52F5@felloff.net>
you got a i810 compatible graphics card?
--
cinap
next reply other threads:[~2019-12-05 5:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-05 5:56 covertusername967 [this message]
-- strict thread matches above, loose matches on Subject: below --
2019-12-03 18:44 cinap_lenrek
2019-11-30 7:47 covertusername967
2019-12-03 6:35 ` k0ga
2019-10-02 4:18 kokamoto
2019-10-02 7:17 ` Steve Simon
2019-10-02 2:57 covertusername967
2019-10-02 0:17 kokamoto
2019-10-02 0:08 cinap_lenrek
2019-10-01 23:31 covertusername967
2019-10-01 23:02 cinap_lenrek
2019-10-01 15:45 cinap_lenrek
2019-10-01 12:21 covertusername967
2019-10-01 2:09 kokamoto
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