From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sigma.offblast.org ([199.191.58.44]) by pp; Sat Feb 21 14:50:31 EST 2015 Received: from [192.168.3.180] ([199.188.193.83]) by sigma; Sat Feb 21 14:50:27 EST 2015 User-Agent: K-9 Mail for Android In-Reply-To: References: <21f8ac56c3ec66454834bd0d850220e3@felloff.net> MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----ZSEH268710GKFL1BM2PWZR10RENS65" Content-Transfer-Encoding: 7bit Subject: Re: [9front] 9front on Xen 4.4 HVM From: mischief@9.offblast.org Date: Sat, 21 Feb 2015 11:50:23 -0800 To: 9front@9front.org,Giacomo Tesio Message-ID: <71CF92B8-D188-4871-94CD-5FA73DFF38FA@9.offblast.org> List-ID: <9front.9front.org> X-Glyph: ➈ X-Bullshit: agile cloud pipelining information layer ------ZSEH268710GKFL1BM2PWZR10RENS65 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable I am the one who imported the xen kernel from labs and I ran 9front on xen = a few months ago=2E It supports one cpu and iirc 512mb ram=2E I can recover= my xen configs and post them shortly=2E On February 21, 2015 10:46:12 AM PST, Giacomo Tesio w= rote: >Thanks for your help cinap=2E It's an interesting dive into the kernel >internals=2E > >Btw, I've tried various combinations of networks drivers (virtio-net >or rtl) and plan9=2Eini options but with no success=2E > >Now I'm planning to write a plan9=2Eini menu with the following >configurations trying one after another looking for a working >solution=2E > >As far as I have undestood, I should test >1) *npmp=3D >2) *nomsi=3D >3) *acpi=3D >and the 4 combinations of them, right? > >Is there anything else that I can do to identify and fix the issue? > >I assigned to the 9front guest only one cpu, to reduce the variables, >but actually, if to run on xen 9front must use a single cpu, then the >disadvantage of the pv guest will be lower, and I could give it a try >too=2E > >Strangely, looks like I'm the first to try installing plan9 on xen in >the last few years=2E=2E=2E > > >Giacomo > >2015-02-21 12:51 GMT+01:00 : >> well, that sounds like a interrupt problem indeed=2E when you send >> packets, all the driver does is to put packets in transmit ring >> and optionally kick the card with some register that it should start >> transmitting=2E >> >> but receiving works by the card issuing a interrupt and then the >> driver looks in the receive ring if there are new packets from the >> card=2E >> >> if interrupt couldnt be enabled (because if broken mp tables), then >> we wont receive anything=2E but sending might still work because it >> doesnt need an interrupt=2E >> >> the relation with mp is that mp systems use the apic interrupt >> controller instead of the legacy pic controller (it is mandatory >> as you need to use the apic to bootstrap the other processors)=2E >> >> enabling interrupt on pic is easy=2E you read the irq register >> from the pci config space (that the bios programmed for you)=2E=2E=2E >> sometimes, pci interrupt router needs to be programmed=2E >> >> apic is a bit more complicated than pic because there can be multiple >> apic controllers (and multiple processors/lapic's) and we require >> tables (from bios) to find the mapping from pci bus interrupt >> lines to the apics (which can then be programmed to send interrupts >> to the lapics/processors)=2E >> >> and then theres msi interrupts that *some* devices support that >> do not require any tables=2E you program register in pci config >> space for the device and you'r done=2E this also works only with >> apic=2E >> >> when you specify *acpi=3D in plan9=2Eini, then the kernel will use >> the acpi tables instead of the mp tables=2E >> >> when you use *nomp=3D, then we will use legacy pic interrupt controller >> and only one cpu can be used (this is also what happens when we >cannot >> find mp table)=2E >> >> -- >> cinap ------ZSEH268710GKFL1BM2PWZR10RENS65 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable I am the one who imported the xen kernel from labs= and I ran 9front on xen a few months ago=2E It supports one cpu and iirc 5= 12mb ram=2E I can recover my xen configs and post them shortly=2E

On February 21, 2015 10:46:12 AM PST, Giacomo Tesi= o <giacomo@tesio=2Eit> wrote:
Thanks for your help cinap=2E  It's an interesting d=
ive into the kernel internals=2E

Btw, I've tried various combina=
tions of networks drivers (virtio-net
or rtl) and plan9=2Eini options =
but with no success=2E

Now I'm planning to write a plan9=2Eini m=
enu with the following
configurations trying one after another looking=
 for a working
solution=2E

As far as I have undestood, I sh=
ould test
1) *npmp=3D
2) *nomsi=3D
3) *acpi=3D
and the =
4 combinations of them, right?

Is there anything else that I can=
 do to identify and fix the issue?

I assigned to the 9front gues=
t only one cpu, to reduce the variables,
but actually, if to run on xe=
n 9front must use a single cpu, then the
disadvantage of the pv guest =
will be lower, and I could give it a try
too=2E

Strangely, =
looks like I'm the first to try installing plan9 on xen in
the last fe=
w years=2E=2E=2E


Giacomo

2015-02-21 12:51 GMT+0=
1:00  <cinap_lenrek@felloff=2Enet>:
 well, that sounds like a interrupt problem indeed=2E =
when you send
 packets, all the driver does is to put packets in trans=
mit ring
 and optionally kick the card with some register that it shou=
ld start
 transmitting=2E

 but receiving works by the card =
issuing a interrupt and then the
 driver looks in the receive ring if =
there are new packets from the
 card=2E

 if interrupt could=
nt be enabled (because if broken mp tables), then
 we wont receive any=
thing=2E but sending might still work because it
 doesnt need an inter=
rupt=2E

 the relation with mp is that mp systems use the apic in=
terrupt
 controller instead of the legacy pic controller (it is mandat=
ory
 as you need to use the apic to bootstrap the other processors)=2E=


 enabling interrupt on pic is easy=2E you read the irq register=

 from the pci config space (that the bios programmed for you)=2E=2E=
=2E
 sometimes, pci interrupt router needs to be programmed=2E
 apic is a bit more complicated than pic because there can be multiple<=
br /> apic controllers (and multiple processors/lapic's) and we require
 tables (from bios) to find the mapping from pci bus interrupt
 line=
s to the apics (which can then be programmed to send interrupts
 to th=
e lapics/processors)=2E

 and then theres msi interrupts that *so=
me* devices support that
 do not require any tables=2E you program reg=
ister in pci config
 space for the device and you'r done=2E this also =
works only with
 apic=2E

 when you specify *acpi=3D in plan=
9=2Eini, then the kernel will use
 the acpi tables instead of the mp t=
ables=2E

 when you use *nomp=3D, then we will use legacy pic int=
errupt controller
 and only one cpu can be used (this is also what hap=
pens when we cannot
 find mp table)=2E

 --
 cinap

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