From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from duke.felloff.net ([216.126.196.34]) by ur; Sat Jul 23 08:27:21 EDT 2016 Message-ID: <72166c8ca9940ca6259a4bbe81ca9d5d@felloff.net> Date: Sat, 23 Jul 2016 14:27:13 +0200 From: cinap_lenrek@felloff.net To: 9front@9front.org Subject: Re: [9front] core-i3 and vesa mode In-Reply-To: <0701ad20b29c2f1a0c1fd3ddde1b55b7@titan.jitaku.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit List-ID: <9front.9front.org> List-Help: X-Glyph: ➈ X-Bullshit: scale-out extended enhancement table method-aware interface it is hard for me to know why you changed these things without studying the documentation of te chip. for a start, get https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part2.pdf chapter 1.1.2 Display Mode Set Sequence has a list of the steps required that you have to drill down into one by one. the second important file is this, describing the PCH: https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3.pdf the cpu generates a displayport like FDI digital signal and sends it to the PCH which then converts it to various graphics ports like VGA, HDMI, LVDS... might be worth a look into the pch dpll clock setup. and compare with what vesa bios programs. -- cinap