From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from relay8-d.mail.gandi.net ([217.70.183.201]) by ewsd; Sat Nov 16 12:23:25 EST 2019 X-Originating-IP: 185.198.110.254 Received: from coeus.antares-labs.eu (unknown [185.198.110.254]) (Authenticated sender: rgl@antares-labs.eu) by relay8-d.mail.gandi.net (Postfix) with ESMTPSA id ABB351BF205 for <9front@9front.org>; Sat, 16 Nov 2019 17:23:19 +0000 (UTC) Message-ID: <8B4CE39A43B2934000451F420D37B255@antares-labs.eu> Date: Sat, 16 Nov 2019 18:23:14 +0100 From: rgl@antares-labs.eu To: 9front@9front.org Subject: Re: [9front] man: new section 9 In-Reply-To: 41531996F786029F0007A6ED57284E8C@antares-labs.eu MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="upas-onwmjxwcgafeatcnzsyznerqds" List-ID: <9front.9front.org> List-Help: X-Glyph: ➈ X-Bullshit: patented private cache-based wrapper pipelining self-signing database This is a multi-part message in MIME format. --upas-onwmjxwcgafeatcnzsyznerqds Content-Disposition: inline Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit hi. last batch for today, i'll try to send more tomorrow. --upas-onwmjxwcgafeatcnzsyznerqds Content-Disposition: inline Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit diff -r 159c7e7ca171 sys/man/9/eve --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sys/man/9/eve Sat Nov 16 14:21:43 2019 +0100 @@ -0,0 +1,46 @@ +.TH EVE 9 +.SH NAME +eve, iseve \- privileged user +.SH SYNOPSIS +.ta \w'\fLchar* 'u +.B +char *eve; +.PP +.B +int iseve(void) +.SH DESCRIPTION +.I Eve +is a null-terminated string containing the name of the owner of +the Plan 9 system (sometimes called the `host owner', +see +.IR cons (3)). +The identity is set on a terminal to the name of the user who logs in. +It is set on a CPU server to the +.I authid +obtained either from NVRAM or by a console prompt. +The initial process created by system initialisation is given the +.I eve +identity. +.PP +.I Iseve +returns true if the current user is +.IR eve . +Several drivers use +.I iseve +to check the caller's identity +before granting permission to perform certain actions. +For example, the console driver allows only the user +.I eve +to write a new identity into the +.B /dev/user +file. +The privileges are strictly local and do not extend into the network +(in particular, to file servers—even ones running on the local machine). +.SH SOURCE +.B /sys/src/9/port/auth.c +.SH SEE ALSO +.IR auth (2), +.IR cap (3), +.IR cons (3), +.IR authsrv (6), +.IR auth (8) --upas-onwmjxwcgafeatcnzsyznerqds Content-Disposition: inline Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit diff -r 159c7e7ca171 sys/man/9/error --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sys/man/9/error Sat Nov 16 17:02:22 2019 +0100 @@ -0,0 +1,171 @@ +.TH ERROR 9 +.SH NAME +error, nexterror, poperror, waserror \- error handling functions +.SH SYNOPSIS +.ta \w'\fL#define 'u +.B +void error(char*) +.PP +.B +void nexterror(void) +.sp 0.1 +.PP +.B +#define poperror() (up->nerrlab--) +.PP +.B +#define waserror() (setlabel(&up->errlab[up->nerrlab++])) +.SH DESCRIPTION +The kernel handles error conditions using non-local gotos, +similar to +.IR setjmp (2), +but using a stack of error labels to implement nested exception handling. +This simplifies many of the internal interfaces by eliminating the need +for returning and checking error codes at every level of the call stack, +at the cost of requiring kernel routines to adhere to a strict discipline. +.PP +Each process has in its defining kernel +.B Proc +structure a stack of labels, +.B NERR +(currently 64) elements deep. +A kernel function that must perform a clean up or recovery action on an error +makes a stylised call to +.IR waserror , +.IR nexterror +and +.IR poperror : +.IP +.EX +.DT +if(waserror()){ + /* recovery action */ + nexterror(); +} +/* normal action */ +poperror(); +.EE +.PP +When called in the normal course of events, +.I waserror +registers an error handling block by pushing its label onto the stack, +and returns zero. +The return value of +.I waserror +should be tested as shown above. +If non-zero (true), the calling function should perform the needed +error recovery, ended by a call to +.I nexterror +to transfer control to the next location on the error stack. +Typical recovery actions include deallocating memory, unlocking resources, and +resetting state variables. +.PP +Within the recovery block, +after handling an error condition, there must normally +be a call to +.I nexterror +to transfer control to any error recovery lower down in the stack. +The main exception is in the outermost function in a process, +which must not call +.I nexterror +(there being nothing further on the stack), but calls +.I pexit +(see +.IR kproc (9)) +instead, +to terminate the process. +.PP +When the need to recover a particular resource has passed, +a function that has called +.I waserror +must +remove the corresponding label from the stack by calling +.IR poperror . +This +must +be done before returning from the function; otherwise, a subsequent call to +.I error +will return to an obsolete activation record, with unpredictable but unpleasant consequences. +.PP +.I Error +copies the given error message, which is limited to +.B ERRMAX +bytes, into the +.B Proc.errstr +of the current process, +enables interrupts by calling +.I spllo +.RI ( native +only), +and finally calls +.I nexterror +to start invoking the recovery procedures currently stacked by +.IR waserror . +The file +.B /sys/src/9/port/error.h +offers a wide selection of predefined error messages, suitable for almost any occasion. +The message set by the most recent call to +.I error +can be obtained within the kernel by examining +.B up->error +and in an application, by using the +.L %r +directive of +.IR print (2). +.PP +A complex function can have nested error handlers. +A +.I waserror +block will follow the acquisition of a resource, releasing it +on error before calling +.I nexterror, +and a +.I poperror +will precede its release in the normal case. +For example: +.IP +.EX +.DT +void +outer(Thing *t) +{ + qlock(t); + if(waserror()){ /* A */ + qunlock(t); + nexterror(); + } + m = mallocz(READSTR, 0); + if(m == nil) + error(Enomem); /* returns to A */ + if(waserror()){ /* B */ + free(m); + nexterror(); /* invokes A */ + } + inner(t); + poperror(); /* pops B */ + free(m); + poperror(); /* pops A */ + qunlock(t); +} +.sp 1v +void +inner(Thing *t) +{ + if(t->bad) + error(Egreg); /* returns to B */ + t->valid++; +} +.EE +.SH SOURCE +.B /sys/src/9/port/proc.c +.SH CAVEATS +The description above has many instances of +.IR should , +.IR will , +.I must +and +.IR "must not" . +.SH SEE ALSO +.IR panic (9), +.IR kproc (9), +.IR splhi (9) --upas-onwmjxwcgafeatcnzsyznerqds Content-Disposition: inline Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit diff -r 159c7e7ca171 sys/man/9/splhi --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sys/man/9/splhi Sat Nov 16 17:32:52 2019 +0100 @@ -0,0 +1,56 @@ +.TH SPLHI 9 +.SH NAME +splhi, spllo, splx, islo \- enable and disable interrupts +.SH SYNOPSIS +.ta \w'\fLvoid 'u +.B +int spllo(void) +.PP +.B +int splhi(void) +.PP +.B +void splx(int x) +.PP +.B +int islo(void) +.SH DESCRIPTION +These primitives enable and disable maskable interrupts on the current +processor. +Generally, device drivers should use +.I ilock +(see +.IR lock (9)), +.IR sleep (9), +or the functions in +.IR qio (9) +to control interaction between processes and interrupt handlers. +Those routines (but not these) provide correct synchronisation on multiprocessors. +.PP +.I Spllo +enables interrupts and returns a flag representing the previous interrupt enable state. +It must not normally be called from interrupt level. +.PP +.I Splhi +disables all maskable interrupts and returns the previous interrupt enable state. +The period during which interrupts are disabled had best be short, +or real-time applications will suffer. +.PP +.I Splx +restores the interrupt enable state to +.IR x , +which must be a value returned +by a previous call to +.I splhi +or +.IR spllo . +.PP +.I Islo +returns true (non-zero) if interrupts are currently enabled, and 0 otherwise. +.SH SOURCE +.B /sys/src/9/*/l.s +.SH SEE ALSO +.IR lock (9), +.IR qio (9), +.IR sleep (9), +.IR intrenable (9) --upas-onwmjxwcgafeatcnzsyznerqds Content-Disposition: inline Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit diff -r 159c7e7ca171 sys/man/9/intrenable --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sys/man/9/intrenable Sat Nov 16 18:14:08 2019 +0100 @@ -0,0 +1,106 @@ +.TH INTRENABLE 9 +.SH NAME +intrenable, intrdisable \- enable (disable) an interrupt handler +.SH SYNOPSIS +.ta \w'\fLvoid* 'u +.B +void intrenable(int v, void (*f)(Ureg*, void*), void* a, int tbdf, char *name) +.PP +.B +void intrdisable(int v, void (*f)(Ureg*, void*), void* a, int tbdf, char *name) +.SH DESCRIPTION +.I Intrenable +registers +.I f +to be called by the kernel's interrupt controller driver each time +an interrupt denoted by +.I v +occurs, and unmasks the corresponding interrupt in the interrupt controller. +The encoding of +.I v +is platform-dependent; it is often an interrupt vector number, but +can be more complex. +.I Tbdf +is a platform-dependent value that might further qualify +.IR v . +It might for instance +denote the type of bus, bus instance, device number and function +(following the PCI device indexing scheme), hence its name, +but can have platform-dependent meaning. +.I Name +is a string that should uniquely identify the corresponding device (eg, \f5"uart0"\fP); +again it is usually platform-dependent. +.I Intrenable +supports sharing of interrupt levels when the hardware does. +.PP +Almost invariably +.I f +is a function defined in a device driver to carry out the device-specific work associated with a given interrupt. +The pointer +.I a +is passed to +.IR f ; +typically it points to the driver's data for a given device or controller. +It also passes +.I f +a +.B Ureg* +value that +contains the registers saved by the interrupt handler (the +contents are platform specific; +see the platform's include file +.BR "ureg.h" ). +.PP +.I F +is invoked by underlying code in the kernel that is invoked directly from the hardware vectors. +It is therefore not running in any process (see +.IR kproc (9); +indeed, on many platforms +the current process pointer +.RB ( up ) +will be nil. +There are many restrictions on kernel functions running outside a process, but a fundamental one is that +they must not +.IR sleep (9), +although they often call +.B wakeup +to signal the occurrence of an event associated with the interrupt. +.IR Qio (9) +and other manual pages note which functions are safe for +.I f +to call. +.PP +The interrupt controller driver does whatever is +required to acknowledge or dismiss the interrupt signal in the interrupt controller, +before calling +.IR f , +for edge-triggered interrupts, +and after calling +.I f +for level-triggered ones. +.I F +is responsible for dealing with the cause of the interrupt in the device, including any +acknowledgement required in the device, before it returns. +.PP +.I Intrdisable +removes any registration previously made by +.I intrenable +with matching parameters, and if no other +interrupt is active on +.IR v , +it masks the interrupt in the controller. +Device drivers that are not dynamically configured tend to call +.I intrenable +during reset or initialisation (see +.IR dev (9)), +but can call it at any appropriate time, and +instead of calling +.I intrdisable +they can simply enable or disable interrupts in the device as required. +.SH SOURCE +.B /sys/src/9/*/trap.c +.SH SEE ALSO +.IR malloc (9), +.IR qio (9), +.IR sleep (9), +.IR splhi (9) --upas-onwmjxwcgafeatcnzsyznerqds--